Patents
Patents for G11C 5 - Details of stores covered by group (20,391)
08/2005
08/31/2005CN1662992A Negative differential resistance (NDR) element and memory with reduced soft error rate
08/31/2005CN1662948A Current drive apparatus and drive method thereof, and display apparatus using same apparatus
08/31/2005CN1661801A Ultraviolet erasing semiconductor memory
08/31/2005CN1661723A Semiconductor integrated circuit
08/31/2005CN1661721A Data circuit structure in high-order local efficiency
08/31/2005CN1661661A Liquid crystal display device
08/30/2005US6937532 Semiconductor memory
08/30/2005US6937496 Semiconductor device
08/30/2005US6937495 Current sensing method and apparatus particularly useful for a memory array of cells having diode-like characteristics
08/30/2005US6937494 Memory module, memory chip, and memory system
08/30/2005US6937493 Programming flash memory via a boundary scan register
08/30/2005US6937248 Pixel array with indirectly associated memory
08/30/2005US6936998 Power glitch free internal voltage generation circuit
08/30/2005US6936874 Semiconductor apparatus having a large-size bus connection
08/25/2005WO2005078729A2 High voltage driver circuit with fast reading operation
08/25/2005WO2005078606A2 Clustered hierarchical file services
08/25/2005WO2005076823A2 Dynamic command and/or address mirroring system and method for memory modules
08/25/2005WO2005043541A3 Method and system for providing a programmable current source for a magnetic memory
08/25/2005WO2004102403A3 A system including a host connected to a plurality of memory modules via a serial memory interconnect
08/25/2005US20050188233 Integrated circuit devices that support dynamic voltage scaling of power supply voltages
08/25/2005US20050185490 Voltage regulator and method of manufacturing the same
08/25/2005US20050185478 Method to produce data cell region and system region for semiconductor memory
08/25/2005US20050185477 Liquid crystal display device
08/25/2005US20050185475 Digital to analog converters
08/25/2005US20050185474 Semiconductor integrated circuit
08/25/2005US20050185450 Semiconductor integrated circuit
08/25/2005US20050185439 Memory module and a method of arranging a signal line of the same
08/25/2005US20050185438 Low profile removable memory module
08/25/2005US20050184795 Boosting circuit and semiconductor device using the same
08/25/2005US20050184329 Multi-layer memory arrays
08/25/2005US20050183566 Stringed musical instrument having a built in hand-held type computer
08/25/2005DE4435649B4 Dateneingabepuffer für eine Halbleiterspeichervorrichtung Data input buffer for a semiconductor memory device
08/25/2005DE102004005699A1 Memory card structure has smaller sized case formed above circuit board, and space is formed between case and circuit board, for storing electronic components
08/25/2005DE102004004785A1 Spannungs-Pumpen-Anordnung für Halbleiter-Bauelemente Voltage pump assembly for semiconductor devices
08/25/2005DE102004004775A1 Spannungsregelsystem Voltage regulation system
08/24/2005EP1565987A1 Seu hard majority voter for triple redundancy
08/24/2005EP1565914A2 Full rail drive enhancement to differential seu hardening circuit while loading data
08/24/2005CN1658262A Light emitting display device using demultiplexer
08/24/2005CN1657930A Device for investigating quality of wine
08/23/2005US6934214 Semiconductor memory device having a hierarchical I/O structure
08/23/2005US6934212 Semiconductor apparatus
08/23/2005US6934210 Semiconductor memory circuit
08/23/2005US6934197 Method and circuit configuration for digitizing a signal in an input buffer of a DRAM device
08/23/2005US6934183 Method and apparatus for resetable memory and design approach for same
08/23/2005US6934176 Systems for programmable memory using silicided poly-silicon fuses
08/23/2005US6934174 Reconfigurable memory arrays
08/23/2005US6934173 256 Meg dynamic random access memory
08/23/2005US6933869 Integrated circuits with temperature-change and threshold-voltage drift compensation
08/23/2005US6933765 Semiconductor device
08/18/2005WO2005074611A2 Interrupt management for multiple event queues
08/18/2005WO2005057585A3 Nand memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
08/18/2005US20050183093 Interrupt management for multiple event queues
08/18/2005US20050180251 Method for optimizing a layout of supply lines
08/18/2005US20050180245 Bus-powered transmitter
08/18/2005US20050180227 Booster circuit
08/18/2005US20050180224 Differential current-mode sensing methods and apparatuses for memories
08/18/2005US20050180223 Accessing stored data
08/18/2005US20050179492 Memory component with improved noise insensitivity
08/18/2005US20050179461 Semiconductor memory circuit and method for operating the same in a standby mode
08/18/2005US20050179421 Voltage regulator using protected low voltage devices
08/18/2005US20050179058 Semiconductor memory device and defect remedying method thereof
08/18/2005US20050179056 System for resonant circuit tuning
08/18/2005DE102004039235A1 Read operation performing method for use in memory cell string, involves applying write sense current across magnetic random access memory cell, and determining whether one voltage across string differs from another voltage
08/18/2005DE102004004026A1 Circuitry for data storage, especially dynamic random access memory (DRAM) with flexibly arranged circuit chips for memory cell units and data transmission units, without faults in units causing total breakdown of entire circuitry
08/17/2005EP1564948A1 Digital transmission with controlled rise and fall times
08/17/2005EP1564645A2 Configurable memory system for embedded processors
08/17/2005EP1563391A2 Combination non-volatile memory and input-output card with direct memory access
08/17/2005EP1417672B1 Display device comprising an array of pixels allowing storage of data
08/17/2005CN1656613A Semiconductor memory element and its lifetime operation starting device
08/17/2005CN1656564A Reference voltage generation for memory circuits
08/17/2005CN1656433A Providing in package power supplies for integrated circuits
08/17/2005CN1655359A Plane decoding method and device for three dimensional memories
08/17/2005CN1655355A Semiconductor integrated circuit
08/17/2005CN1655203A Bus-powered transmitter
08/17/2005CN1655133A Method and system of external data storage
08/17/2005CN1215565C Memory array self aligning method of forming floating grid memory unit and memory array
08/16/2005US6931614 Method and apparatus for placing repeating flip-flop stations on signal lines within an integrated circuit
08/16/2005US6931479 Method and apparatus for multi-functional inputs of a memory device
08/16/2005US6931467 Memory integrated circuit device which samples data upon detection of a strobe signal
08/16/2005US6930949 Power savings in active standby mode
08/16/2005US6930948 Semiconductor memory device having an internal voltage generation circuit for selectively generating an internal voltage according to an external voltage level
08/16/2005US6930947 Power source detector
08/16/2005US6930904 Circuit topology for high-speed memory access
08/16/2005US6930903 Arrangement of integrated circuits in a memory module
08/16/2005US6930900 Arrangement of integrated circuits in a memory module
08/16/2005US6930540 Integrated circuit with voltage divider and buffered capacitor
08/16/2005US6930536 Voltage booster
08/16/2005US6930535 High voltage supply circuit and a method of supplying high voltage
08/16/2005US6930521 Circuit for controlling the performance of an integrated circuit
08/16/2005US6930503 System for testing integrated circuit devices
08/16/2005CA2262995C Non-contact integrated circuit comprising a charge pump
08/12/2005CA2495759A1 Method and system of external data storage
08/11/2005WO2005073904A1 Semiconductor device
08/11/2005WO2005072444A2 Intelligent memory device
08/11/2005US20050177765 Storage sub-system having expanded data read
08/11/2005US20050177690 Dynamic command and/or address mirroring system and method for memory modules
08/11/2005US20050177671 Intelligent memory device clock distribution architecture
08/11/2005US20050177657 Queue depth management for communication between host and peripheral device
08/11/2005US20050174864 Voltage regulating circuit and method of regulating voltage
08/11/2005US20050174858 Semiconductor memory device and data read and write method of the same