Patents
Patents for G11C 5 - Details of stores covered by group (20,391)
11/2005
11/24/2005DE102005018640A1 Schaltungsmodul Circuit module
11/24/2005DE102004021398A1 Verfahren und Schaltungsanordnung zum Zurücksetzen einer integrierten Schaltung Method and circuit for resetting an integrated circuit
11/24/2005DE102004021226A1 Semiconductor circuit module, e.g. for memory chips, has chips in two groups aligned at 180 degrees to each other so that each branch of signal line ends lies in y-direction
11/24/2005DE102004020576A1 Datenverarbeitungsvorrichtung mit schaltbarer Ladungsneutralität und Verfahren zum Betreiben einer Dual-Rail-Schaltungskomponente A data processing apparatus with switchable charge neutrality and method for operating a dual-rail circuit component
11/23/2005EP1597732A1 Multi-chip card
11/23/2005EP1328941A4 Modular memory device
11/23/2005CN1700850A Semiconductor device, noise reduction method, and shield cover
11/23/2005CN1700599A 半导体器件 Semiconductor devices
11/23/2005CN1700469A Integrated circuit structure and method of providing source voltage to integrated circuit
11/23/2005CN1700444A Wafer dividing method
11/23/2005CN1700356A Semiconductor memory
11/23/2005CN1228848C Electronic circuit and semiconductor memory
11/23/2005CN1228847C Semiconductor integrated circuit device
11/22/2005US6967890 Battery power measuring system and method for a battery-backed SRAM
11/22/2005US6967868 Semiconductor memory device having flexible column redundancy scheme
11/22/2005US6967523 Cascaded charge pump power supply with different gate oxide thickness transistors
11/22/2005US6967470 Voltage regulator combining a series type regulator with a shunt type regulator having a constant current source
11/22/2005US6967371 System with meshed power and signal buses on cell array
11/17/2005WO2005109445A1 Semiconductor device and semiconductor device control method
11/17/2005WO2005109439A1 Nonvolatile semiconductor memory, semiconductor device and charge pump circuit
11/17/2005WO2005109437A2 Pfet nonvolatile memory
11/17/2005WO2005109436A2 Charge pump clock for non-volatile memories
11/17/2005WO2005109213A1 Adaptive cache engine for storage area network including systems and methods related thereto
11/17/2005WO2005066965A3 Integral memory buffer and serial presence detect capability for fully-buffered memory modules
11/17/2005US20050256995 Preserving memory resources by liimiting time-date information for a subset of properties
11/17/2005US20050254338 Address generation apparatus and operation apparatus
11/17/2005US20050254333 Internal voltage generator
11/17/2005US20050254316 Semiconductor device and control method of the same
11/17/2005US20050254313 Non-volatile semiconductor memory, semiconductor device and charge pump circuit
11/17/2005US20050254312 Memory I/O driving circuit with reduced noise and driving method
11/17/2005US20050254311 Method and apparatus for resetable memory and design approach for same
11/17/2005US20050254310 Nonvolatile semiconductor memory device including ferroelectric semiconductor pattern and methods for writing data in and reading data from the same
11/17/2005US20050254308 High voltage generating circuit preserving charge pumping efficiency
11/17/2005US20050254304 Circuit and method for controlling boosting voltage
11/17/2005US20050254296 Method for controlling current during read and program operations of programmable diode
11/17/2005US20050254282 Reference generator system and methods for reading ferroelectric memory cells using reduced bitline voltages
11/17/2005US20050254279 DRAM memory cell arrangement
11/17/2005US20050254278 Highly parallel data storage chip device
11/17/2005US20050254221 Clock routing in multiple channel modules and bus systems
11/17/2005US20050254219 Memory card
11/17/2005US20050253644 Trimming functional parameters in integrated circuits
11/17/2005US20050253638 Method and circuit arrangement for resetting an integrated circuit
11/17/2005DE20221422U1 Connection of memory modules to a memory controller on the main-board of a PC using a point-to-point connection system that supports any available number of modules and ensures all connection channels are used
11/17/2005DE10157057B4 Halbleiterspeicherbaustein mit geringem Stromverbrauch A semiconductor memory device with low power consumption
11/16/2005CN1697087A Circuit and method for controlling boosting voltage
11/16/2005CN1697076A Method for controlling current during read and program operations of programmable diode
11/16/2005CN1697074A Layout of storage unit
11/10/2005WO2005024561A3 Memory module and method having on-board data search capabilites and processor-based system using such memory modules
11/10/2005US20050251713 Multi-port memory device having serial I/O interface
11/10/2005US20050251671 Method for sampling optic disc data and apparatus thereof
11/10/2005US20050251061 Method and system to record, store and transmit waveform signals to regulate body organ function
11/10/2005US20050249020 Multi-port memory device
11/10/2005US20050249019 Bus connection circuit for read operation of multi-port memory device
11/10/2005US20050249017 Semiconductor device having a power down mode
11/10/2005US20050249014 Multiple electrical fuss shared with one program device
11/10/2005US20050249013 Techniques for storing accurate operating current values
11/10/2005US20050248998 High speed redundant data sensing method and apparatus
11/10/2005US20050248996 Integrated circuit for stabilizing a voltage
11/10/2005US20050248995 Memory system and method for two step memory write operations
11/10/2005US20050248984 Nonvolatile memory array organization and usage
11/10/2005US20050248974 Non-volatile ferroelectric cell array block having hierarchy transfer sensing architecture
11/10/2005US20050248971 Column driver and flat panel display having the same
11/10/2005US20050248393 Noise cancellation circuits and methods
11/10/2005US20050248387 Boosted voltage generator
11/10/2005US20050248385 Voltage supplier of semiconductor memory device
11/10/2005US20050248017 Electronic circuit package
11/10/2005DE102004021051B3 DRAM-Speicherzellenanordnung nebst Betriebsverfahren DRAM memory cell array in addition to operating procedures
11/09/2005EP1594112A2 Column driver and flat panel display having the same
11/09/2005CN1695249A Semiconductor method
11/09/2005CN1695124A Method and system for controlling memory accesses to memory modules having a memory hub architecture
11/09/2005CN1694327A Fuse circuit
11/09/2005CN1694241A Method and circuit arrangement for resetting an integrated circuit
11/09/2005CN1694182A Static dasd and control circuit and control method
11/09/2005CN1694180A Multi-port memory device having serial i/o interface
11/09/2005CN1694174A Fuse circuit
11/09/2005CN1694143A Column driver and flat panel display having the same
11/08/2005US6963515 Method and device for a scalable memory building block
11/08/2005US6963504 Apparatus and method for disturb-free programming of passive element memory cells
11/08/2005US6963135 Semiconductor package for memory chips
11/03/2005WO2005104324A2 Folded, fully buffered memory module
11/03/2005WO2005104132A1 Electronic circuit with memory for which a threshold level is selected
11/03/2005WO2004084173A3 System and method for representing playing of musical instruments
11/03/2005US20050246471 High frequency bus system
11/03/2005US20050246462 Maintaining time-date information for syncing low fidelity devices
11/03/2005US20050246400 Maintaining time-date information for syncing low fidelity devices
11/03/2005US20050246399 Preserving memory resources by limiting time-date information for a subset of properties
11/03/2005US20050243641 Input circuit for memory device
11/03/2005US20050243635 Power savings in active standby mode
11/03/2005US20050243634 Standby mode SRAM design for power reduction
11/03/2005US20050243633 Memory circuit and method for providing an item of information for a prescribed period of time
11/03/2005US20050243632 Circuitry for a programmable element
11/03/2005US20050243631 Semiconductor memory circuit
11/03/2005US20050243624 Semiconductor memory device capable of controlling drivability of overdriver
11/03/2005US20050243617 Memory device
11/03/2005US20050243615 Buffer device for a clock enable signal used in a memory device
11/03/2005US20050243614 Apparatus and method for data outputting
11/03/2005US20050243613 Method of high speed data rate testing
11/03/2005US20050243612 Asynchronous request/synchronous data dynamic random access memory
11/03/2005US20050243610 Method and system for background processing of data in a storage system
11/03/2005US20050243609 Adaptive cache engine for storage area network including systems and methods related thereto