Patents
Patents for G11C 17 - Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards (10,133)
02/2006
02/14/2006US7000160 Semiconductor integrated circuit and a method of testing the same
02/14/2006US6999351 Computer systems, processes for turning a SRAM cell off, and processes for writing a SRAM cell and processes for reading data from a SRAM cell
02/14/2006US6999334 System and method for determining the logic state of a memory cell in a magnetic tunnel junction memory device
02/14/2006US6999333 Method and apparatus for assessing one-time programmable cells
02/14/2006US6998878 Semiconductor integrated circuit and semiconductor logic circuit used in the integrated circuit
02/09/2006US20060028895 Silver island anti-fuse
02/09/2006US20060028894 Programmable semi-fusible link read only memory and method of margin testing same
02/09/2006US20060028878 Programming and evaluating through PMOS injection
02/09/2006US20060028854 Charge pump circuit
02/09/2006CA2575557A1 Prognosis of breast cancer patients
02/08/2006CN1241205C Address generating circuit
02/07/2006US6996475 Computer software products for nucleic acid hybridization analysis
02/07/2006US6996023 Semiconductor memory device capable of reducing current consumption in active mode
02/07/2006US6996021 ROM embedded DRAM with bias sensing
02/07/2006US6995601 Fuse state detection circuit
02/02/2006WO2006012137A2 Reduced area, reduced programming voltage cmos efuse-based scannable non-volatile memory bitcell
02/02/2006US20060023549 Fuse data storage system using core memory
02/01/2006CN1240132C Memory device mfg. and assembling structure and method
01/2006
01/31/2006US6992948 Memory device having address generating circuit using phase adjustment by sampling divided clock to generate address signal of several bits having one bit changed in sequential order
01/31/2006US6992945 Fuse circuit
01/31/2006US6992941 Semiconductor memory device
01/31/2006US6992932 Method circuit and system for read error detection in a non-volatile memory array
01/31/2006US6992925 High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline
01/31/2006US6992909 Multi-bit ROM cell, for storing one of n>4 possible states and having bi-directional read, an array of such cells, and a method for making the array
01/31/2006US6992359 Spin transfer magnetic element with free layers having high perpendicular anisotropy and in-plane equilibrium magnetization
01/31/2006US6991970 Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of semiconductor device
01/26/2006US20060018153 Operating array cells with matched reference cells
01/25/2006EP1123556B1 Fuse circuit having zero power draw for partially blown condition
01/24/2006US6990018 Non-volatile semiconductor memory device, electronic card using the same and electronic apparatus
01/24/2006US6989707 Semiconductor circuit and initialization method
01/19/2006US20060013032 Nonvolatile semiconductor storage device
01/19/2006US20060012458 Fuse structure
01/18/2006CN1723508A One-time programmable memory device
01/17/2006US6987703 Nonvolatile semiconductor storage device and write time determining method therefor
01/17/2006US6987297 Semiconductor memory device and manufacturing method thereof
01/12/2006US20060007724 Double-cell memory device
01/12/2006US20060007723 Electro-optical device, signal processing circuit thereof, signal processing method thereof and electronic apparatus
01/12/2006DE19727378B4 Leseverstärker eines Halbleiterspeicher-Bauelements Sense amplifier of a semiconductor memory device
01/11/2006EP1614120A1 Magnetic memory cell including a fuse element for disconnecting the defective magnetic element
01/11/2006CN1720591A Programmable non-volatile semiconductor memory device
01/10/2006US6985387 System and method for one-time programmed memory through direct-tunneling oxide breakdown
01/10/2006US6984548 Method of making a nonvolatile memory programmable by a heat induced chemical reaction
01/05/2006US20060002227 Fuse box, semiconductor memory device having the same and setting method thereof
01/05/2006US20060002212 Semiconductor device
01/05/2006US20060002167 Minimizing adjacent wordline disturb in a memory device
01/05/2006DE10126567B4 Integrierte Schaltung Integrated circuit
01/04/2006CN1235289C Fuse circuit used for semiconductor integrated circuit
01/03/2006US6983404 Method and apparatus for checking the resistance of programmable elements
01/03/2006US6982903 Field effect devices having a source controlled via a nanotube switching element
12/2005
12/29/2005WO2005117114A3 Programming semiconductor dies for pin map compatibility
12/29/2005WO2005082061A3 Spin transfer magnetic element with free layers having high perpendicular anisotropy and in-plane equilibrium magnetization
12/29/2005US20050286336 Flash EEprom system
12/29/2005US20050286332 Reduced area, reduced programming voltage CMOS eFUSE-based scannable non-volatile memory bitcell
12/29/2005US20050285663 Static, low-voltage fuse-based cell with high-voltage programming
12/29/2005US20050285223 Fuse structure
12/28/2005EP1046121B1 Automatic test process with non-volatile result table store
12/28/2005CN1714403A Using a MOS select gate for a phase change memory
12/27/2005US6981237 Command user interface with programmable decoder
12/27/2005US6980465 Addressing circuit for a cross-point memory array including cross-point resistive elements
12/27/2005US6980457 Thyristor-based device having a reduced-resistance contact to a buried emitter region
12/27/2005US6980456 Memory with low and fixed pre-charge loading
12/27/2005US6980455 Remote sensed pre-amplifier for cross-point arrays
12/22/2005WO2005098867A3 Rewriteable electronic fuses
12/22/2005US20050281102 Semiconductor structure processing using multiple laterally spaced laser beam spots with joint velocity profiling
12/22/2005US20050281101 Semiconductor structure processing using multiple laterally spaced laser beam spots with on-axis offset
12/22/2005US20050281072 Non-volatile, high-density integrated circuit memory
12/22/2005US20050281069 Computer systems, processes for turning a SRAM cell off, and processes for writing a SRAM cell
12/22/2005US20050280495 Fuse-data reading circuit
12/22/2005DE4344293B4 Sensorcharakteristik-Abgleichschaltung zum Abgleichen der Ausgangscharakteristik eines Halbleitersensors Sensor characteristic adjustment circuit for matching the output characteristics of a semiconductor sensor
12/20/2005US6977852 ROM-based controller monitor in a memory device
12/20/2005US6977836 Memory device that can be irreversibly programmed electrically
12/20/2005CA2269857C Memory element with energy control mechanism
12/15/2005WO2005119779A1 Memory device and manufacturing method of the same
12/15/2005US20050276089 Plateline voltage pulsing to reduce storage node disturbance in ferroelectric memory
12/15/2005US20050274966 Fuse and write method for fuse
12/14/2005CN1707697A Method for programming a memory arrangement and programmed memory arrangement
12/14/2005CN1231922C Shaded ROM and internal storage containing the same
12/13/2005US6975528 Read only memory device
12/08/2005WO2005117114A2 Programming semiconductor dies for pin map compatibility
12/08/2005WO2005116720A1 Mems device having time-varying control
12/08/2005WO2005041107A3 A method circuit and system for determining a reference voltage
12/08/2005US20050270879 No-precharge FAMOS cell and latch circuit in a memory device
12/08/2005US20050270833 Reading circuit for reading a memory cell
12/08/2005US20050270820 Molecular memory
12/08/2005US20050270085 Method and circuit for fuse programming and endpoint detection
12/08/2005US20050269646 Memory
12/08/2005DE19730762B4 Flash-Speicherzelle und Verfahren zu deren Herstellung Flash memory cell and method for producing them
12/08/2005DE102004021541A1 Passivierung von Brennstrecken Passivation of focal distances
12/06/2005US6973629 Circuit arrangement
12/06/2005US6972614 Circuits associated with fusible elements for establishing and detecting of the states of those elements
12/06/2005US6972613 Fuse latch circuit with non-disruptive re-interrogation
12/06/2005US6972612 Semiconductor device with malfunction control circuit and controlling method thereof
12/06/2005US6972587 Built-in self repair for an integrated circuit
11/2005
11/30/2005EP1008183B1 Memory location arrangement and method for producing the same
11/30/2005CN1229806C Storage unit read-out based on non-continuous property
11/29/2005US6970394 Programming method for electrical fuse cell and circuit thereof
11/29/2005US6970370 Ferroelectric write once read only memory for archival storage
11/24/2005WO2005059953A3 Solid state magnetic memory system and method
11/24/2005US20050259495 Multiple-time programmable resistance circuit
11/24/2005US20050258861 Programming semiconductor dies for pin map compatibility
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