Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 16 - Erasable programmable read-only memories
Patents for G11C 16 - Erasable programmable read-only memories (44,373)
05/2003
05/08/2003US20030086295 Semiconductor device that enables simultaneous read and write/read operation
05/08/2003US20030086293 Error management for writable tracking storage units
05/08/2003US20030086292 Nonvolatile semiconductor storage device and test method therefor
05/08/2003US20030086291 Isolating phase change meterial memory cells
05/08/2003US20030085727 Test structure and method for determining a minimum tunnel opening size in a non-volatile memory cell
05/08/2003US20030085421 Semiconductor device and operation method thereof
05/07/2003EP1308964A1 Fast programming method for nonvolatile memories, in particular flash memories, and related memory architecture
05/07/2003EP1308963A1 Semiconductor memory device
05/07/2003EP1308962A2 Single poly embedded EPROM
05/07/2003EP1308961A2 Memory cell structure
05/07/2003EP1308960A2 Feedback write method for programmable memory
05/07/2003EP1307912A2 Automated determination and display of the physical location of a failed cell in an array of memory cells
05/07/2003EP1222664B1 Method for identifying an integrated circuit
05/07/2003EP1125298A4 Regulated voltage supply circuit for inducing tunneling current in floating gate memory devices
05/07/2003EP1002320A4 Block decoded wordline driver with positive and negative voltage modes using four terminal mos transistors
05/07/2003EP0963586B1 A scalable flash eeprom memory cell, method of manufacturing and operation thereof
05/07/2003EP0792270B1 Use of 2,7,8-trimethyl-2-(beta-carboxyethyl)-6-hydroxy chroman (LLU-alpha)
05/07/2003EP0728367B1 A flash eprom transistor array and method for manufacturing the same
05/07/2003CN1416174A 可擦写可编程只读存储器 EPROM
05/07/2003CN1416139A Nonvolatile semiconductor memory having backup memory block
05/06/2003US6560729 Automated determination and display of the physical location of a failed cell in an array of memory cells
05/06/2003US6560164 Semiconductor integrated circuit device with internal clock generating circuit
05/06/2003US6560162 Memory cell decoder not including a charge pump
05/06/2003US6560161 Synchronous flash memory command sequence
05/06/2003US6560152 Non-volatile memory with temperature-compensated data read
05/06/2003US6560146 Dynamic column block selection
05/06/2003US6560145 Charge pump for a nonvolatile memory with read voltage regulation in the presence of address skew, and nonvolatile memory comprising such a charge pump
05/06/2003US6560144 Nonvolatile semiconductor memory device
05/06/2003US6560143 Method and structure for efficient data verification operation for non-volatile memories
05/06/2003US6559710 Raised voltage generation circuit
05/06/2003US6559707 Bootstrap circuit
05/06/2003US6559500 Non-volatile semiconductor memory and its driving method
05/06/2003US6558997 Method for fabricating the control and floating gate electrodes without having their upper surface silicided
05/06/2003US6558967 Multi-bit-per-cell memory system with numbers of bits per cell set by testing of memory units
05/02/2003EP1306856A2 Fowler-Nordheim (F-N) tunneling for pre-programming in a floating gate memory device
05/02/2003EP1306855A2 Method for erasing a memory cell
05/02/2003EP1306854A1 Floating gate programmable cell array for standard CMOS
05/02/2003EP1306852A2 A memory device
05/02/2003EP1305805A1 Electrically-eraseable programmable read-only memory having reduced-page-size program and erase
05/02/2003EP1305804A1 Synchronous flash memory with status burst output
05/02/2003EP1029326B1 Programmable access protection in a flash memory device
05/02/2003EP1008041A4 Processor with embedded in-circuit programming structures
05/02/2003EP0547640B1 Non-volatile semiconductor memory device and memory system using the same
05/01/2003WO2003036652A1 Using transfer bits during data transfer from non-volatile to volatile memories
05/01/2003WO2003036651A2 Drain side sensing scheme for virtual ground flash eprom array with adjacent bit charge and hold
05/01/2003WO2003036650A2 Method for erasing a memory cell
05/01/2003WO2002089147A3 Circuit and method for memory test and repair
05/01/2003WO2002071410A3 Higher program threshold voltage and faster programming rates based on improved erase methods
05/01/2003WO2002057995A3 Parallel erase operations in memory systems
05/01/2003US20030084258 Memory apparatus
05/01/2003US20030084231 Nonvolatile semiconductor storage device with interface functions
05/01/2003US20030084230 Using transfer bits during data transfer from non-volatile to volatile memories
05/01/2003US20030082879 Non-volatile semiconductor memory device and method of manufacturing the same
05/01/2003US20030082871 Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
05/01/2003US20030082616 Analyzing preferential nucleic acid sequences; obtain genomic nucleotide sequences, denature, incubate with primers and generate complimentary nucleotide sequences, amplify sequences, sequence products, detect mutation in alleles
05/01/2003US20030081480 Semiconductor memory device and its data writing method
05/01/2003US20030081478 Nonvolatile semiconductor memory device with backup memory block
05/01/2003US20030081468 Method and device for backing up data in a memory module and memory module
05/01/2003US20030081460 Operating a non-volatile memory device
05/01/2003US20030081459 Fail number detecting circuit of flash memory
05/01/2003US20030081458 Method and device for reading dual bit memory cells using multiple reference cells with two side read
05/01/2003US20030081456 Charge trapping memory cell, method for fabricating it, and semiconductor memory device
05/01/2003US20030081455 Floating gate programmable cell array for standard CMOS
05/01/2003US20030081451 Technique and apparatus for performing write operations to a phase change material memory device
05/01/2003US20030081448 High voltage bit/column latch for Vcc operation
05/01/2003US20030081446 Memory cell structure
05/01/2003US20030081445 Feedback write method for programmable memory
05/01/2003US20030080372 Semiconductor memory cell, method for fabricating the memory cell, and semiconductor memory device
05/01/2003US20030080370 Utilizing dielectric material positioned within memory cells for non-volatile charge storage that affect an operating parameter of the individual memory cells according to a level of charge stored in at least one common region thereof
05/01/2003US20030079540 Control gate decoder for twin MONOS memory with two bit erase capability
04/2003
04/30/2003CN1414566A Method for reducing coupling effect between nonvolatile memory storage cell
04/30/2003CN1414565A Quick equating earth wire circuit and detection circuit and its method
04/30/2003CN1107323C Sense amplifier circuit of nonvolatile semiconductor memory device
04/30/2003CN1107322C Nonvolatile memory and its method of programming
04/30/2003CN1107321C Multi-valued, fixed value storage location with improved signal-to noise ratio
04/29/2003US6556508 Integrated circuit memory device having interleaved read and program capabilities and methods of operating same
04/29/2003US6556504 Nonvolatile semiconductor memory device and data input/output control method thereof
04/29/2003US6556485 Output buffer capable of adjusting current drivability and semiconductor integrated circuit device having the same
04/29/2003US6556481 3-step write operation nonvolatile semiconductor one-transistor, nor-type flash EEPROM memory cell
04/29/2003US6556480 EEPROM circuit, in particular a microcontroller including read while write EEPROM for code and data storing
04/29/2003US6556479 Nonvolatile semiconductor memory device
04/29/2003US6556478 Method and apparatus for a voltage responsive RESET for EEPROM
04/29/2003US6556476 Non-volatile memory data protection
04/29/2003US6556475 Non-volatile memory and semiconductor device
04/29/2003US6556474 Programming method of nonvolatile semiconductor memory device
04/29/2003US6556465 Adjustable circuits for analog or multi-level memory
04/29/2003US6555882 Semiconductor element and semiconductor memory device using the same
04/29/2003US6555870 Nonvolatile semiconductor memory device and method for producing same
04/29/2003US6555869 Non-volatile memory device and method of manufacturing the same
04/29/2003US6555860 Compositionally modified resistive electrode
04/24/2003WO2003034331A1 Smart card having a memory using a ultra-thin dielectric
04/24/2003US20030079099 Nonvolatile semiconductor memory device with password unlock function
04/24/2003US20030079097 Optical navigation sensor with shadow memory
04/24/2003US20030076733 Synchronous flash memory command sequence
04/24/2003US20030076730 Nonvolatile semiconductor memory device of dual-operation type with data protection function
04/24/2003US20030076719 Non-volatile semiconductor memory device with cache function and program, read, and page copy-back operations thereof
04/24/2003US20030076718 Method for storing and reading data in a multilevel nonvolatile memory, and architecture therefor
04/24/2003US20030076717 Non-volatile semiconductor memory apparatus
04/24/2003US20030076711 Semiconductor memory device
04/24/2003US20030076710 Method for erasing a memory cell
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