Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 16 - Erasable programmable read-only memories
Patents for G11C 16 - Erasable programmable read-only memories (44,373)
05/2005
05/19/2005US20050108301 Method for balancing wear when writing data in a flash memory
05/19/2005US20050105373 Nonvolatile semiconductor memory device
05/19/2005US20050105361 Charge trapping memory cell and method for operating a charge trapping memory cell
05/19/2005US20050105359 Nonvolatile semiconductor memory
05/19/2005US20050105358 Sense amplifier systems and a matrix-addressable memory device provided therewith
05/19/2005US20050105353 Method for operating a memory cell array
05/19/2005US20050105343 Flash with consistent latency for read operations
05/19/2005US20050105341 NROM flash memory with self-aligned structural charge separation
05/19/2005US20050105340 Sensing circuit for single bit-line semiconductor memory device
05/19/2005US20050105339 Nonvolatile memory
05/19/2005US20050105338 Negatively biasing deselected memory cells
05/19/2005US20050105337 Method, system and circuit for programming a non-volatile memory array
05/19/2005US20050105336 Nonvolatile semiconductor memory
05/19/2005US20050105335 Semiconductor memory device and electric device with the same
05/19/2005US20050105334 Nonvolatile semiconductor memory device, electronic card and electronic apparatus
05/19/2005US20050105333 Method of measuring threshold voltage for a NAND flash memory device
05/19/2005US20050105331 Memory system having flash memory where a one-time programmable block is included
05/19/2005US20050105330 Semiconductor memory device and manufacturing method thereof
05/19/2005US20050105329 Serial transistor-cell array architecture
05/19/2005US20050105327 Serial transistor-cell array architecture
05/19/2005US20050105317 Data processor including an authentication function for judging access right
05/19/2005US20050105006 Production line boot sector lock
05/19/2005US20050104625 Data input/output buffer and semiconductor memory device using the same
05/19/2005US20050104120 Non-volatile semiconductor memory device with multi-layer gate structure
05/19/2005US20050104117 Charge-trapping memory device and methods for operating and manufacturing the cell
05/19/2005US20050104116 Stacked gate memory cell with erase to gate, array, and method of manufacturing
05/19/2005US20050104115 Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby
05/19/2005US20050104103 Nonvolatile semiconductor memory device including high efficiency and low cost redundant structure
05/19/2005DE10357786B3 Pre-charging arrangement for read out of integrated read-only memory has read amplifier coupled directly to bit line with source line coupled to given reference potential via switch element in selected state of bit line
05/19/2005DE102004010243A1 Static memory cell, has circuit for limiting current through PMC resistance when changing from high-resistance state to low-resistance state
05/18/2005EP1531493A2 Flash memory array
05/18/2005EP1531480A2 Memory circuit
05/18/2005EP1530803A2 Nrom memory cell, memory array, related devices an methods
05/18/2005EP1530795A2 Hold-up power supply for flash memory
05/18/2005CN2701171Y Electronic equipment for automatically appeasing baby by voice with radio monitoring
05/18/2005CN1617730A Compositions and methods for enhancing corticosteroid delivery
05/18/2005CN1617346A Semiconductor memory device and manufacturing method thereof
05/18/2005CN1617261A Flash memory pipelined burst read operation circuit, method, and system
05/17/2005US6895543 Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
05/17/2005US6894944 Semiconductor integrated circuit device
05/17/2005US6894939 Data processor, semiconductor memory device and clock frequency detecting method
05/17/2005US6894934 Non-volatile memory cell sensing circuit, particularly for low power supply voltages and high capacitive load values
05/17/2005US6894932 Dual cell memory device having a top dielectric stack
05/17/2005US6894931 Nonvolatile semiconductor memory device
05/17/2005US6894930 Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND
05/17/2005US6894929 Method of programming semiconductor memory device having memory cells and method of erasing the same
05/17/2005US6894927 Data writing and reading methods for flash memories and circuitry thereof
05/17/2005US6894926 Multi-state memory
05/17/2005US6894925 Flash memory cell programming method and system
05/17/2005US6894924 Operating a non-volatile memory device
05/17/2005US6894914 Nonvolatile memory device with parallel and serial functioning mode and selectable communication protocol
05/17/2005US6894913 Non-volatile semiconductor memory and method of operating the same
05/17/2005US6894344 Semiconductor integrated circuit having two switch transistors formed between two diffusion-layer lines
05/17/2005US6894339 Flash memory with trench select gate and fabrication process
05/17/2005US6893921 Nonvolatile memories with a floating gate having an upward protrusion
05/12/2005WO2005043589A2 Method and system for enhancing the endurance of memory cells
05/12/2005WO2005043548A1 Programming method based on the behaviour of non-volatile memory cenlls
05/12/2005WO2005043544A1 Memory assembly and method for operating the same
05/12/2005US20050102466 Non-volatile semiconductor memory with large erase blocks storing cycle counts
05/12/2005US20050101236 Current-limited latch
05/12/2005US20050101087 Semiconductor memory device and its production process
05/12/2005US20050101081 Nonvolatile semiconductor memory and a fabrication method thereof
05/12/2005US20050100197 Card type device capable of reading fingerprint and fingerprint identification system
05/12/2005US20050099870 Non-volatile semiconductor memory with large erase blocks storing cycle counts
05/12/2005US20050099849 Flash memory programming using gate induced junction leakage current
05/12/2005US20050099848 Non-volatile semiconductor memory device and electric device with the same
05/12/2005US20050099847 Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems
05/12/2005US20050099845 Erase block data splitting
05/12/2005US20050098823 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
05/12/2005US20050098817 Non-volatile memory cell
05/12/2005US20050098814 Methods of fabricating phase changeable memory devices having reduced cell areas
05/12/2005US20050098811 Phase-change memory device using chalcogenide compound as the material of memory cells
05/12/2005DE10392492T5 Durch Algorithmus dynamisierte Referenzprogrammierung By programming algorithm dynamized reference
05/12/2005DE10357777B3 Verfahren zum Betrieb eines Speicherzellenfeldes A method of operating a memory cell array
05/11/2005EP1530219A2 Semiconductor memory with synchronous and asynchronous mode selection during power-down
05/11/2005EP1529293A1 Built-in-self-test of flash memory cells
05/11/2005CN2699433Y Magneto-resistive type storing unit structure and magneto-resistive type random access memory circuit
05/11/2005CN1615547A Non-volatile two-transistor semiconductor memory cell and method for producing the same
05/11/2005CN1615527A 半导体集成电路 The semiconductor integrated circuit
05/11/2005CN1615526A Source side sensing scheme for virtual ground read of flash eprom array with adjacent bit precharge
05/11/2005CN1615525A Method and apparatus for soft program verification in a memory device
05/11/2005CN1614751A Method for manufacturing flash memory device
05/11/2005CN1614718A Semiconductor memory device and non-volatile memory verifying method
05/11/2005CN1614716A 半导体存储器 Semiconductor memory
05/11/2005CN1201402C Nonvolatile semiconductor memory
05/11/2005CN1201335C Code addressing storage cell for flash memory device
05/11/2005CN1201264C Power supply circuit building in integrated circuit
05/10/2005US6892270 Synchronous flash memory emulating the pin configuration of SDRAM
05/10/2005US6892269 Nonvolatile memory device with double serial/parallel communication interface
05/10/2005US6891765 Circuit and/or method for implementing a patch mechanism for embedded program ROM
05/10/2005US6891764 Apparatus and method to read a nonvolatile memory
05/10/2005US6891760 Method of erasing information in non-volatile semiconductor memory device
05/10/2005US6891759 Semiconductor memory having electrically erasable and programmable semiconductor memory cells
05/10/2005US6891758 Position based erase verification levels in a flash memory device
05/10/2005US6891757 Semiconductor memory device
05/10/2005US6891756 Flash memory comprising an erase verify algorithm integrated into a programming algorithm
05/10/2005US6891755 Architecture for a flash-EEPROM simultaneously readable in other sectors while erasing and/or programming one or more sectors
05/10/2005US6891754 Nonvolatile semiconductor memory with a programming operation and the method thereof
05/10/2005US6891753 Highly compact non-volatile memory and method therefor with internal serial buses
05/10/2005US6891752 System and method for erase voltage control during multiple sector erase of a flash memory device
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