Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
06/1987
06/02/1987US4670836 Device for detecting an overlap of operands to be accessed
06/02/1987CA1222573A1 Address translation buffer
05/1987
05/27/1987EP0223570A2 Vector access control system
05/27/1987EP0223551A2 Main storage access control system for virtual computing function system
05/27/1987EP0223130A2 Electronic postage meter circuitry
05/26/1987US4669056 Data processing system with a plurality of processors accessing a common bus to interleaved storage
05/26/1987US4669043 Memory access controller
05/26/1987CA1222327A1 Knowledge-retrieving artificial-intelligence system utilizing diagonally-exchanging associative-loop memories
05/26/1987CA1222325A1 Control structure for a document processing system
05/19/1987US4667330 Semiconductor memory device
05/19/1987US4667325 Method and apparatus of scanning control for information processing systems
05/19/1987US4667308 Multi-dimensional-access memory system with combined data rotation and multiplexing
05/19/1987US4667306 Method and apparatus for generating surface-fill vectors
05/19/1987US4667288 Enable/disable control checking apparatus
05/19/1987CA1222062A1 Method for protecting volatile primary store in a staged storage system by circularly journaling updates into finite nonvolatile local memory
05/19/1987CA1222061A1 Store buffer device in digital computer system
05/13/1987EP0221303A2 Automatic I/O address assignment
05/13/1987EP0221274A2 Method for ensuring switchover in a restartable data base system
05/12/1987US4665556 Image signal processor
05/12/1987US4665506 Memory system with write protection
05/12/1987US4665484 Shared memory multiprocessing system & method
05/06/1987EP0220990A2 Buffer storage control system
05/06/1987EP0220929A2 Memory management system
05/06/1987EP0220920A1 Instruction for implementing a secure computer system
05/06/1987EP0220731A2 A method of distributed file recovery and a system using the method
05/06/1987EP0220683A2 Storage area structure in information processor
05/06/1987EP0220535A2 Random access memory system
05/06/1987EP0220451A2 A cache coherence mechanism based on locking
05/06/1987EP0220449A1 Circuit arrangement for transforming 2n global addresses used in a bus system with several participants into 2m local addresses used by one of the system participants
05/06/1987EP0220327A1 Address expanding system
05/05/1987US4663742 Directory memory system having simultaneous write, compare and bypass capabilites
05/05/1987US4663736 File deletion system in a file unit
05/05/1987US4663732 Apparatus for storing and retrieving data in predetermined multi-bit quantities containing fewer bits of data than word length quantities
05/05/1987CA1221467A1 Address conversion unit for multiprocessor system
05/05/1987CA1221466A1 Memory subsystem
04/1987
04/28/1987US4661956 Method of correcting errors of digital signals in the recording and reproduction of digital signals
04/28/1987US4661955 Extended error correction for package error correction codes
04/28/1987CA1221176A1 Method of storing and printing image with non- reentrant basic disc operating system
04/28/1987CA1221172A1 Buffer storage control system
04/23/1987WO1987002488A1 Multi-port memory system
04/22/1987EP0218841A2 Lock-free serialising access to shared resources
04/22/1987CN85107587A Lsi microprocessor chip with backward pin compatibility and forward expandable functionality
04/21/1987US4660181 Memory system
04/21/1987US4660142 Digital data processing system employing an object-based addressing system with a single object table
04/21/1987US4660141 Self configuring computer network with automatic bus exchange of module identification numbers and processor assigned module numbers
04/21/1987US4660130 Method for managing virtual memory to separate active and stable memory blocks
04/21/1987CA1220831A1 Bus arrangement for addressing equipment units and a method therefor
04/15/1987EP0218523A2 programmable access memory
04/15/1987EP0218413A2 System and method for correcting errors in coded data recorded in blocks and sub-blocks
04/15/1987EP0217937A1 Memory control circuit permitting microcomputer system to utilize static and dynamic rams.
04/15/1987CN85107534A Dynamically allocated local/global strage system
04/14/1987US4658356 Control system for updating a change bit
04/14/1987US4658350 Extended addressing apparatus and method for direct storage access devices
04/08/1987EP0217479A2 Information processing unit
04/08/1987EP0217348A2 Memory connected state detecting circuit
04/08/1987EP0217232A1 Circuit for generating split addresses
04/08/1987EP0217168A2 Method for processing address translation exceptions in a virtual memory system
04/07/1987US4656579 Digital data processing system having a uniquely organized memory system and means for storing and accessing information therein
04/07/1987CA1220286A1 Virtual memory address translation mechanism with combined hash address table and inverted page table
04/07/1987CA1220284A1 Buffer storage system
04/01/1987EP0216620A2 Instruction address producing unit capable of accessing an instruction segment of an extended size
04/01/1987EP0216535A2 Integration of computer systems with heterogeneous data bases
04/01/1987EP0216431A2 Generating addresses for circuit units
04/01/1987EP0216170A2 Storage management method and system in a multiprocessor environment
04/01/1987EP0216063A2 Document composition from parts inventory
04/01/1987EP0215992A1 Method for storing the control code of a processor allowing effective code modification and addressing circuit therefor
04/01/1987EP0052216B1 Data storage systems
03/1987
03/31/1987US4654819 For a fault-tolerant computer system
03/31/1987US4654791 Input/output paging mechanism in a data processor
03/31/1987US4654790 In a data processing system
03/31/1987US4654789 LSI microprocessor chip with backward pin compatibility
03/31/1987US4654787 Apparatus for locating memory modules having different sizes within a memory space
03/31/1987US4654782 Variable segment size plural cache system with cache memory unit selection based on relative priorities of accessed encached programs
03/31/1987US4654779 Multiprocessor system including firmware
03/31/1987US4654778 In a data processing system
03/31/1987US4654777 Segmented one and two level paging address translation system
03/26/1987WO1987001858A2 Memory system with page mode operation
03/26/1987WO1987000675A3 Control system for chained circuit modules
03/26/1987DE3532812A1 Method of extending the address area of a microcomputer and arrangement for carrying out the method
03/25/1987EP0215544A1 Virtual memory address fetching
03/25/1987EP0215428A2 Graphic processing system
03/25/1987EP0215133A1 Method and apparatus of constructing and recording list of recorded data in postscript-type optical disk
03/24/1987US4652996 Encachment apparatus using multiple frames and responding to a key to obtain data therefrom
03/24/1987US4652995 Encachement apparatus using multiple caches for providing multiple component values to form data items
03/24/1987US4652994 System for transmitting data to auxiliary memory device
03/24/1987US4652991 Data transfer apparatus
03/24/1987US4652940 Method of identifying magnetic tape as tape for journal
03/24/1987CA1219681A1 Computer systems
03/18/1987EP0214870A2 System for controlling a data transfer instruction with an extension storage device
03/18/1987EP0214718A2 Digital computer
03/18/1987EP0214490A2 Data processing apparatus with a virtual storage address boundary check circuit
03/17/1987US4651308 LSI memory circuit
03/17/1987US4650975 IC card and an identification system thereof
03/17/1987CA1219375A1 Main storage failure address control system in a data processing system
03/12/1987WO1987001483A1 System for preventing software piracy employing multi-encrypted keys and single decryption circuit modules
03/12/1987WO1987001482A1 Data processing system including a prefetch circuit
03/11/1987EP0214050A2 Parallel row-to-row data transfer in random access memories
03/11/1987EP0213843A2 Digital processor control
03/11/1987EP0213832A2 Improved virtual memory computer system
03/11/1987EP0213694A2 Digital computer with cache capable of concurrently handling multiple accesses from parallel processors