| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 03/19/1985 | US4506364 Memory address permutation apparatus |
| 03/19/1985 | US4506326 Apparatus and method for synthesizing a query for accessing a relational data base |
| 03/19/1985 | US4506323 Cache/disk file status indicator with data protection feature |
| 03/19/1985 | CA1184310A1 Multi-processor office system complex |
| 03/19/1985 | CA1184308A1 True single error correction system |
| 03/12/1985 | US4504902 Cache arrangement for direct memory access block transfer |
| 03/12/1985 | CA1183963A1 Sequential word aligned addressing apparatus |
| 03/12/1985 | CA1183962A1 Memory addressing system |
| 03/05/1985 | US4503516 Methodology for transforming a first editable document form prepared by an interactive text processing system to a second editable document form usable by an interactive or batch text processing system |
| 03/05/1985 | US4503501 Adaptive domain partitioning of cache memory space |
| 03/05/1985 | US4503497 System for independent cache-to-cache transfer |
| 03/05/1985 | US4503491 Computer with expanded addressing capability |
| 03/05/1985 | CA1183608A1 Key storage error processing system |
| 02/28/1985 | WO1985000920A1 Multiplexed-address interface for addressing memories of various sizes |
| 02/27/1985 | EP0133569A2 Circuit arrangement for telecommunication installations, in particular telephone exchanges with data protection by parity bits |
| 02/27/1985 | EP0133568A2 Circuit arrangement for telecommunication installations, in particular telephone exchanges with memories and memory sequential control circuits individually assigned to them |
| 02/26/1985 | US4502115 Data processing unit of a microprogram control system for variable length data |
| 02/26/1985 | US4502110 In a data processing system |
| 02/26/1985 | CA1183275A1 Byte addressable memory for variable length instructions and data |
| 02/26/1985 | CA1183274A1 Virtual storage system and method |
| 02/26/1985 | CA1183273A1 Interface mechanism between a pair of processors, such as host and peripheral-controlling processors in data processing systems |
| 02/19/1985 | US4500962 Computer system having an extended directly addressable memory space |
| 02/19/1985 | US4500961 Page mode memory system |
| 02/19/1985 | US4500958 Memory controller with data rotation arrangement |
| 02/19/1985 | US4500954 Cache bypass system with post-block transfer directory examinations for updating cache and/or maintaining bypass |
| 02/19/1985 | US4500952 Mechanism for control of address translation by a program using a plurality of translation tables |
| 02/19/1985 | US4500235 Coupling |
| 02/19/1985 | CA1182927A1 Memory management arrangement for microprocessor systems |
| 02/19/1985 | CA1182925A1 Error processing system for buffer storage |
| 02/18/1985 | EP0042000A4 Cache memory in which the data block size is variable. |
| 02/13/1985 | EP0132586A2 A method of transferring system data from one set of storage devices to another |
| 02/12/1985 | US4499539 Method and apparatus for limiting allocated data-storage space in a data-storage unit |
| 02/12/1985 | US4499538 Access arbitration system to several processors or microprocessors with a common bus |
| 02/12/1985 | US4499536 Signal transfer timing control using stored data relating to operating speeds of memory and processor |
| 02/12/1985 | CA1182580A1 Physical address developing unit |
| 02/12/1985 | CA1182578A1 Pause apparatus for a memory controller with interleaved queuing apparatus |
| 02/05/1985 | US4498147 Methodology for transforming a first editable document form prepared with a batch text processing system to a second editable document form usable by an interactive or batch text processing system |
| 02/05/1985 | US4498145 Method for assuring atomicity of multi-row update operations in a database system |
| 02/05/1985 | US4498132 Data processing system using object-based information and a protection scheme for determining access rights to such information and using multilevel microcode techniques |
| 02/05/1985 | US4498131 Data processing system having addressing mechanisms for processing object-based information and a protection scheme for determining access rights to such information |
| 02/05/1985 | CA1182216A1 Semiconductor random access memory system |
| 01/31/1985 | WO1985000451A1 Demand paging scheme for a multi-atb shared memory processing system |
| 01/31/1985 | WO1985000449A1 Magnetic tape-data link processor providing automatic data transfer |
| 01/31/1985 | WO1985000448A1 Address translation buffer |
| 01/29/1985 | US4497039 Join operation processing system in relational model |
| 01/29/1985 | US4497021 Microcomputer system operating in multiple modes |
| 01/29/1985 | US4497020 Selective mapping system and method |
| 01/29/1985 | CA1181866A1 Multiword memory data storage and addressing technique and apparatus |
| 01/29/1985 | CA1181864A1 Image processing system |
| 01/23/1985 | EP0132157A2 Data processing system having dual processors |
| 01/23/1985 | EP0132129A2 Address translation buffer |
| 01/22/1985 | US4495603 Test system for segmented memory |
| 01/22/1985 | US4495575 Information processing apparatus for virtual storage control system |
| 01/22/1985 | US4495567 Multiprocessor/multimemory control system |
| 01/22/1985 | CA1181529A1 Micro computer system with selectable operational mode |
| 01/22/1985 | CA1181528A1 Micro computer adapted for use with crt display |
| 01/17/1985 | WO1985000232A1 Memory management system |
| 01/16/1985 | EP0131417A1 Magnetic tape-data link processor providing automatic data transfer |
| 01/16/1985 | EP0131277A2 Computer hierarchy control |
| 01/16/1985 | EP0059203B1 A coupling |
| 01/15/1985 | US4494190 FIFO buffer to cache memory |
| 01/15/1985 | US4494187 Microcomputer with high speed program memory |
| 01/15/1985 | US4494114 Security arrangement for and method of rendering microprocessor-controlled electronic equipment inoperative after occurrence of disabling event |
| 01/15/1985 | CA1181180A1 Computer system key and lock protection mechanism |
| 01/15/1985 | CA1181179A1 Cache buffered memory subsystem |
| 01/15/1985 | CA1181178A1 Computer with expanded addressing capability |
| 01/09/1985 | EP0130760A2 Non-volatile data stores |
| 01/09/1985 | EP0130593A2 Shared resource lockout apparatus |
| 01/09/1985 | EP0130534A2 Apparatus and method for testing and verifying the refresh logic of dynamic MOS memories |
| 01/09/1985 | EP0130471A2 Interface controller for connecting multiple asynchronous buses and data processing system including such controller |
| 01/09/1985 | EP0130414A2 Directory memory |
| 01/09/1985 | EP0130381A2 Mechanism for implementing one machine cycle executable branch-on-any-bit-in-any-register instructions in a primitive instruction set computing system |
| 01/09/1985 | EP0130349A2 A method for the replacement of blocks of information and its use in a data processing system |
| 01/09/1985 | EP0130340A2 Memory mapping and readout system |
| 01/08/1985 | US4493075 Self repairing bulk memory |
| 01/08/1985 | US4493034 Apparatus and method for an operating system supervisor in a data processing system |
| 01/08/1985 | US4493033 Data processing system |
| 01/08/1985 | US4493031 Memory write protection using timers |
| 01/08/1985 | US4493026 Set associative sector cache |
| 01/08/1985 | US4493023 Digital data processing system having unique addressing means and means for identifying and accessing operands |
| 01/02/1985 | EP0129693A2 Apparatus for switching routine supporting storage stacks |
| 01/02/1985 | CA1180466A Detection of sequential data stream |
| 01/02/1985 | CA1180465A Method and apparatus for limiting data occupancy in a cache |
| 01/02/1985 | CA1180464A Storage fetch protect override controls |
| 01/02/1985 | CA1180463A Method and apparatus for hashing cache addresses in a cached disk storage system |
| 01/02/1985 | CA1180452A Storage element reconfiguration |
| 01/01/1985 | US4491915 Multiprocessor-memory data transfer network |
| 01/01/1985 | US4491911 Data processing system with improved address translation facility |
| 01/01/1985 | US4491909 Data processing system having shared memory |
| 12/27/1984 | EP0129061A2 Apparatus and method for randomly accessing sequentially stored data |
| 12/27/1984 | EP0128945A1 Memory backup system. |
| 12/27/1984 | CA1180130A Rom security circuit |
| 12/27/1984 | CA1180126A Remote terminal address and baud rate selection |
| 12/25/1984 | US4490787 STO Stack control system |
| 12/25/1984 | US4490782 Data processing system |
| 12/20/1984 | WO1984004983A1 Page mode memory system |
| 12/19/1984 | EP0128362A1 Circuit arrangement comprising a memory and an access control unit |
| 12/19/1984 | EP0128353A2 Error recovery of non-store-through cache |
| 12/19/1984 | EP0128228A1 Method and circuit arrangement for the generation of pulses of arbitrary time relation within directly successive pulse intervals with very high precision and temporal resolution |
| 12/18/1984 | US4489403 Fault alignment control system and circuits |