Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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07/24/1990 | US4943913 Operating system accessing control blocks by using home address space segment table to control instruction and operand fetch and store operations |
07/24/1990 | US4943910 Information processing apparatus |
07/24/1990 | US4943908 Multiple branch analyzer for prefetching cache lines |
07/18/1990 | EP0378399A2 Cache content control in multi-processor networks |
07/18/1990 | EP0378367A2 Functional database system |
07/18/1990 | EP0378307A2 Prevention of alteration of data stored in secure integrated circuit chip memory |
07/18/1990 | EP0378306A2 Secure integrated circuit chip with conductive field |
07/18/1990 | EP0377993A2 Sorting distributed data |
07/18/1990 | EP0377971A2 I/O bus caching |
07/18/1990 | EP0377970A2 I/O caching |
07/18/1990 | EP0377969A2 I/O cached computer systems |
07/18/1990 | CN1008839B Storage management of microprocessing system |
07/17/1990 | US4942578 Buffer control method and apparatus |
07/17/1990 | US4942521 Microprocessor with a cache memory in which validity flags for first and second data areas are simultaneously readable |
07/17/1990 | US4942519 Coprocessor having a slave processor capable of checking address mapping |
07/17/1990 | US4942518 Cache store bypass for computer |
07/12/1990 | WO1990007746A1 Computer system memory performance improvement apparatus |
07/12/1990 | WO1990007745A1 Arithmetic unit |
07/11/1990 | EP0377466A1 Microcomputer system for digital signal processing |
07/11/1990 | EP0377436A2 Apparatus and method for increased operand availability in a data processing unit with a store through cache memory unit strategy |
07/11/1990 | EP0377431A2 Apparatus and method for address translation of non-aligned double word virtual addresses |
07/11/1990 | EP0377368A1 Data-processing device having a non-volatile electrically erasable and reprogrammable memory |
07/11/1990 | EP0377299A2 An encapsulation system for a computer system |
07/11/1990 | EP0377296A2 Cache coherency control when programmable option selection (POS) and memory expansion |
07/11/1990 | EP0377164A2 LRU error detection using the collection of read and written LRU bits |
07/11/1990 | EP0377162A2 Storage array for LRU apparatus |
07/11/1990 | EP0377133A2 Wait depth limited concurrency control method |
07/11/1990 | EP0235255B1 Data processing system including a prefetch circuit |
07/10/1990 | US4941175 Tamper-resistant method for authorizing access to data between a host and a predetermined number of attached workstations |
07/10/1990 | US4941088 Split bus multiprocessing system with data transfer between main memory and caches using interleaving of sub-operations on sub-busses |
07/10/1990 | US4941085 Data processing system having apparatus for increasing the execution speed of bit field instructions |
07/10/1990 | CA2007391A1 Functional database system |
07/05/1990 | DE3943095A1 Einrichtung und verfahren zum zuordnen verfuegbaren speicherraums zum systemspeicherraum in einem computersystem Means and methods to assign available storage period for the system memory space in a computer system |
07/04/1990 | EP0376253A2 Information processing apparatus with cache memory |
07/04/1990 | EP0375892A2 Data processing system |
07/04/1990 | EP0375883A2 Cache storage system |
07/04/1990 | EP0375864A2 Cache bypass |
07/04/1990 | CA2005698A1 Programmable option selection and paged memory cache coherency control |
07/03/1990 | US4939641 Multi-processor system with cache memories |
07/03/1990 | US4939636 Memory management unit |
07/03/1990 | US4939598 Managing data storage space on large capacity record media |
06/28/1990 | WO1990007185A1 Data processing device comprising a non-volatile, electrically erasable and reprogrammable memory |
06/28/1990 | WO1990007184A1 Method and apparatus for handling high speed data |
06/28/1990 | WO1990007154A1 Memory address mechanism in a distributed memory architecture |
06/28/1990 | WO1990007151A1 Data management system |
06/27/1990 | EP0375307A2 Structure for and method of arranging recursively derived data in a database |
06/27/1990 | EP0375194A2 Dual port RAM |
06/27/1990 | EP0375140A2 Document marking |
06/27/1990 | EP0375121A2 Method and apparatus for efficient DRAM control |
06/27/1990 | EP0375105A2 Memory apparatus for multiple processor systems |
06/27/1990 | EP0374829A2 Dual port memory unit |
06/27/1990 | EP0374733A1 Single-chip microcomputer including EPROM therein |
06/27/1990 | EP0374370A2 Method for storing into non-exclusive cache lines in multiprocessor systems |
06/27/1990 | EP0374338A1 Shared intelligent memory for the interconnection of distributed micro processors |
06/27/1990 | EP0374337A1 Load balancing technique in shared memory with distributed structure |
06/27/1990 | CN1043402A System and method for virtual memory management |
06/27/1990 | CN1043401A Increasing options in locating rom in computer memory space |
06/26/1990 | US4937791 High performance dynamic ram interface |
06/26/1990 | US4937738 Data processing system which selectively bypasses a cache memory in fetching information based upon bit information of an instruction |
06/26/1990 | US4937736 Memory controller for protected memory with automatic access granting capability |
06/26/1990 | US4937735 Memory access system utilizing address translation |
06/26/1990 | US4937733 Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system |
06/26/1990 | CA1270958A1 Resource allocation in distributed control systems |
06/20/1990 | EP0374127A2 Electronic system for video display |
06/20/1990 | EP0373790A2 Data processing apparatus for saving and restoring |
06/20/1990 | EP0373780A2 Address translation for multiple-sized pages |
06/20/1990 | EP0373594A2 Computer memory having its output lines selected for connection to a data bus by the memory address |
06/20/1990 | EP0373299A2 Method and apparatus for memory routing scheme |
06/20/1990 | CN1008482B Arrangements for programme control |
06/19/1990 | US4935902 Sequential access memory |
06/19/1990 | US4935869 File transfer control method among a plurality of computer systems |
06/19/1990 | US4935867 Signal processor memory management unit with indirect addressing using selectable offsets and modulo values for indexed address calculations |
06/19/1990 | US4934851 Text processing system including plural text and corresponding memories |
06/19/1990 | US4934823 Staging method and system in electronic file apparatus |
06/19/1990 | CA2005953A1 Dual port read/write register file memory |
06/19/1990 | CA1270579A1 Cache memory consistency control with explicit software instructions |
06/14/1990 | WO1990006556A1 Main read-write memory and extended memory management |
06/13/1990 | EP0372865A2 Cache device for supplying a fixed word length of a variable length instruction code and instruction fetch device |
06/13/1990 | EP0372841A2 Arrangement for and method of locating ROM in computer memory space |
06/13/1990 | EP0372834A2 Translation technique |
06/13/1990 | EP0372779A2 Bulk storage access using external page tables |
06/13/1990 | EP0372579A2 High-performance computer system with fault-tolerant capability |
06/13/1990 | EP0372578A2 Memory management in high-performance fault-tolerant computer system |
06/13/1990 | EP0372231A2 Vector processor |
06/13/1990 | EP0372201A2 Method for fetching potentially dirty data in multiprocessor systems |
06/13/1990 | EP0372185A2 Method and apparatus for the storage and manipulation of three-dimensional data arrays |
06/13/1990 | EP0186719B1 Device for correcting errors in memories |
06/12/1990 | US4933969 Data authentication and protection system |
06/12/1990 | US4933909 Dual read/write register file memory |
06/12/1990 | US4933900 Semiconductor memory device having arithmetic means |
06/12/1990 | US4933898 Secure integrated circuit chip with conductive shield |
06/12/1990 | US4933879 Multi-plane video RAM |
06/12/1990 | US4933848 Method for enforcing referential constraints in a database management system |
06/12/1990 | US4933846 Network communications adapter with dual interleaved memory banks servicing multiple processors |
06/12/1990 | US4933837 Methods and apparatus for optimizing instruction processing in computer systems employing a combination of instruction cache and high speed consecutive transfer memories |
06/12/1990 | US4933835 Computer system |
06/12/1990 | CA1270333A1 Parity spreading to enhance storge access |
06/09/1990 | CA2003342A1 Memory management in high-performance fault-tolerant computer system |
06/09/1990 | CA2003337A1 High-performance computer system with fault-tolerant capability |
06/06/1990 | EP0371959A2 Electronic system for video display |