Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
07/1997
07/22/1997US5651099 Use of a genetic algorithm to optimize memory space
07/22/1997US5651067 Storage and selective information transmission system for personal data
07/22/1997US5650974 Semiconductor memory device and power supply control IC for use with semiconductor memory device
07/22/1997US5650968 Semiconductor memory device
07/22/1997US5650955 In a semiconductor substrate
07/22/1997US5650757 Impedance stepping for increasing the operating speed of computer backplane busses
07/22/1997US5649862 Video game apparatus, method and device for controlling same, and memory cartridge for video games
07/17/1997WO1997025798A1 System for controlling access and distribution of digital property
07/17/1997WO1997025711A1 Method and apparatus for dubbing control
07/17/1997WO1997025674A1 Circuit and method for enabling a function in a multiple memory device module
07/17/1997DE19623853A1 Semiconductor memory storage device
07/16/1997EP0784287A2 Buffer memory managing method and printing apparatus adopting the method
07/16/1997EP0784281A2 Field level replication method
07/16/1997EP0784273A2 Generating a backup copy in RAID subsystems
07/16/1997EP0784260A1 External storage control device and data transfer method between external storage control devices
07/16/1997EP0784259A2 Data manupulation in systems displaying a visual representation of a physical environment
07/16/1997EP0784258A1 Method of managing software by transmitted data on network
07/16/1997EP0783741A1 Data transfer system comprising a terminal and a portable data carrier and method of recharging the portable data carrier by means of the terminal
07/16/1997EP0783740A1 Data transmission system between at least one write-read station and several data carriers
07/16/1997EP0783738A1 Object oriented data store integration environment
07/16/1997EP0783735A1 Method and apparatus for processing memory-type information within a microprocessor
07/16/1997EP0783733A1 Methodology for generating object structures for accessing conventional, non-object-oriented business applications
07/16/1997EP0775345A4 A two-way set-associative cache memory
07/16/1997EP0734553A4 Split level cache
07/16/1997EP0497110B1 Error detecting method and apparatus for computer memory having multi-bit output memory circuits
07/16/1997CN1154615A Configurable password integrity servers for use in shared resource environment
07/15/1997US5649231 Storage control method and apparatus having a buffer storage for transferring variable amounts of data to a main storage based on current system load
07/15/1997US5649229 Pipeline data processor with arithmetic/logic unit capable of performing different kinds of calculations in a pipeline stage
07/15/1997US5649212 Information processing system having a floppy disk drive with disk protection during a resume mode
07/15/1997US5649194 In a distributed system
07/15/1997US5649192 Self-organized information storage system
07/15/1997US5649191 Information searching apparatus for managing and retrieving document data stored in a storage unit
07/15/1997US5649187 Method and apparatus for remotely controlling and monitoring the use of computer software
07/15/1997US5649185 Method and means for providing access to a library of digitized documents and images
07/15/1997US5649183 Method for compressing full text indexes with document identifiers and location offsets
07/15/1997US5649161 Prepaging during PCI master initiated wait cycles
07/15/1997US5649159 Data processor with a multi-level protection mechanism, multi-level protection circuit, and method therefor
07/15/1997US5649158 Computer implemented method
07/15/1997US5649156 Cache management system utilizing a cache data replacer responsive to cache stress threshold value and the period of time a data element remains in cache
07/15/1997US5649155 Cache memory accessed by continuation requests
07/15/1997US5649154 Cache memory system having secondary cache integrated with primary cache for use with VLSI circuits
07/15/1997US5649153 Aggressive adaption algorithm for selective record caching
07/15/1997US5649144 Apparatus, systems and methods for improving data cache hit rates
07/15/1997US5649143 Apparatus and method for providing a cache indexing scheme less susceptible to cache collisions
07/15/1997US5649142 Method and apparatus for translating addresses using mask and replacement value registers and for accessing a service routine in response to a page fault
07/15/1997US5649141 Multiprocessor system for locally managing address translation table
07/15/1997US5649140 System for use in translating virtual addresses into absolute addresses
07/15/1997US5649139 Method and apparatus for virtual memory mapping and transaction management in an object-oriented database system
07/15/1997US5649090 Fault tolerant multiprocessor computer system
07/15/1997US5649070 Learning system with prototype replacement
07/15/1997US5648929 Flash memory card
07/10/1997WO1997024847A1 A method and apparatus for controlling linear and toggle mode burst access sequences using toggle mode increment logic
07/10/1997WO1997024725A1 High performance universal multi-port internally cached dynamic random access memory system, architecture and method
07/10/1997WO1997024684A1 Flexible hyperlink association system and method
07/10/1997WO1997024675A1 Method and apparatus for controlling access to encrypted data files in a computer system
07/10/1997WO1997024672A1 Performing speculative system memory reads
07/10/1997WO1997024623A1 Method and apparatus for combining writes to memory
07/10/1997DE19653568A1 Access network for memory addressing of partial words
07/09/1997EP0783155A2 Method of labelling a device connected to a data bus
07/09/1997EP0783154A2 Split-level graphics library
07/09/1997EP0783072A1 Motor-operated window cover
07/09/1997EP0745239B1 Method and apparatus to secure distributed digital directory object changes
07/09/1997EP0580727B1 Coupling circuit, use thereof in a card, and method
07/09/1997EP0575358B1 Database management system graphical query front end
07/09/1997EP0566966B1 Method and system for incremental backup copying of data
07/09/1997EP0480421B1 Testable RAM architecture in a microprocessor having embedded cache memory
07/09/1997CN1154167A A cache flush mechanism for a secondary cache memory
07/08/1997US5646993 Information reproducing method and apparatus having protect function and recording medium used in apparatus
07/08/1997US5646906 Method & Apparatus for real-time processing of moving picture signals using flash memories
07/08/1997US5646904 Semicoductor memory with a timing controlled for receiving data at a semiconductor memory module to be accessed
07/08/1997US5646871 Process for systems analysis
07/03/1997WO1997023830A1 Method and apparatus for dynamically resizing a frame buffer in a shared memory buffer architecture system
07/03/1997WO1997023829A1 Memory manager allowing flash memory to supplement main memory
07/03/1997WO1997023828A1 Memory page compression
07/03/1997WO1997023824A1 The boot of a shared memory buffer architecture employing an arbitrary operating system
07/03/1997DE19651775A1 Buffer memory control for separation of sequential sample data in audio decoder
07/03/1997DE19628039A1 Memory address control circuit
07/02/1997EP0782350A2 Method for activating and executing secured functions in a communication system
07/02/1997EP0782146A2 Nonvolatile memory having data storing area and attribute data area for storing attribute data of data storing area
07/02/1997EP0782079A1 Burst access in data processing systems
07/02/1997EP0782078A2 Determination of array padding using collision vectors
07/02/1997EP0782077A1 Method and arrangement for converting memory addresses into memory control signals
07/02/1997EP0782076A1 Arrangement for detecting the configuration of a memory
07/02/1997EP0782071A2 Data processor
07/02/1997EP0781432A1 Method of pre-caching data utilizing thread lists and multimedia editing system using such pre-caching
07/02/1997EP0781431A1 Method and apparatus for encoding history of file access to support automatic file caching on portable and desktop computers
07/02/1997EP0507026B1 A process for storing files of an electronic system
07/01/1997US5644780 Multiple port high speed register file with interleaved write ports for use with very long instruction word (vlin) and n-way superscaler processors
07/01/1997US5644766 System and method for managing a hierarchical storage system through improved data migration
07/01/1997US5644764 In a computer system
07/01/1997US5644755 Processor with virtual system mode
07/01/1997US5644753 Fast, dual ported cache controller for data processors in a packet switched cache coherent multiprocessor system
07/01/1997US5644752 Combined store queue for a master-slave cache system
07/01/1997US5644751 Distributed file system (DFS) cache management based on file access characteristics
07/01/1997US5644750 For writing/reading data in/from the divided areas
07/01/1997US5644748 Processor system including an index buffer circuit and a translation look-aside buffer control circuit for processor-to-processor interfacing
07/01/1997US5644747 For a computer system
07/01/1997US5644736 System and method for selecting components of a hierarchical file structure
07/01/1997US5644732 Method and apparatus for assigning addresses to a computer system's three dimensional packing arrangement
07/01/1997US5644708 Method and device to control a memory