Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
---|
07/15/1999 | WO1999035579A1 Two-level address translation and memory registration system and method |
07/15/1999 | WO1999035578A1 Method for increasing efficiency in a multi-processor system and multi-processor system with increased efficiency |
07/15/1999 | WO1999035576A1 Information handling system with suspend/resume operation |
07/15/1999 | WO1999035552A1 Method for authorising access to execution rights of privileged controls |
07/15/1999 | WO1999023785A3 Method and system for facilitating distributed software development in a distribution unaware manner |
07/15/1999 | WO1999023784A3 Distributed web application server |
07/15/1999 | DE19756287A1 Access protection for computer system |
07/15/1999 | CA2434734A1 Method of copy protecting signals |
07/15/1999 | CA2434702A1 Method of copy protecting signals |
07/15/1999 | CA2315392A1 System for delivering data content over a low bit rate transmission channel |
07/15/1999 | CA2282479A1 Transmitting revisions with digital signatures |
07/14/1999 | EP0929170A2 Methods, systems and apparatus for providing device status information within a communication network |
07/14/1999 | EP0929044A2 Rich text medium displaying method and picture information providing system |
07/14/1999 | EP0929040A2 Microprocessor with data randomizing |
07/14/1999 | EP0929039A2 Computer circuits, systems and methods using partial cache cleaning |
07/14/1999 | EP0929037A1 Data transfer device and data transfer method |
07/14/1999 | EP0928451A1 Memory management system and method |
07/14/1999 | EP0928444A1 Device for protecting an electronic apparatus |
07/14/1999 | EP0807346A4 Cd-prom |
07/14/1999 | CN1222984A Anti-theft device |
07/14/1999 | CN1044160C Achievement method of personal computer system with security features |
07/13/1999 | US5924127 Address translation buffer system and method for invalidating address translation buffer, the address translation buffer partitioned into zones according to a computer attribute |
07/13/1999 | US5924126 Method and apparatus for providing address translations for input/output operations in a computer system |
07/13/1999 | US5924125 Method and apparatus for parallel access to consecutive TLB entries |
07/13/1999 | US5924124 In a microcomputer |
07/13/1999 | US5924123 Semiconductor storage apparatus with copy guard function |
07/13/1999 | US5924121 Adaptive writeback of cache line data in a computer operated with burst mode transfer cycles |
07/13/1999 | US5924120 Method and apparatus for maximizing utilization of an internal processor bus in the context of external transactions running at speeds fractionally greater than internal transaction times |
07/13/1999 | US5924119 Consistent packet switched memory bus for shared memory multiprocessors |
07/13/1999 | US5924118 Method and system for speculatively sourcing cache memory data prior to upstream cache invalidation within a multiprocessor data-processing system |
07/13/1999 | US5924117 Multi-ported and interleaved cache memory supporting multiple simultaneous accesses thereto |
07/13/1999 | US5924115 Hierarchical memory architecture for a programmable integrated circuit having an interconnect structure connected in a tree configuration |
07/13/1999 | US5924114 Data processor |
07/13/1999 | US5924113 Direct logical block addressing flash memory mass storage architecture |
07/13/1999 | US5924111 Method and system for interleaving data in multiple memory bank partitions |
07/13/1999 | US5924110 Multischeme memory management system for computer |
07/13/1999 | US5924099 Data transfer with expanded clipboard formats |
07/13/1999 | US5924098 Method and apparatus for managing a linked-list data structure |
07/13/1999 | US5924092 Computer system and method which sort array elements to optimize array modifications |
07/13/1999 | US5923899 System for generating configuration output signal responsive to configuration input signal, enabling configuration, and providing status signal identifying enabled configuration responsive to the output signal |
07/13/1999 | US5923898 System for executing I/O request when an I/O request queue entry matches a snoop table entry or executing snoop when not matched |
07/13/1999 | US5923877 Object-oriented programming memory management framework and method |
07/13/1999 | US5923864 Virtual storage address space access control system including auxiliary translation lookaside buffer |
07/13/1999 | US5923857 Method and apparatus for ordering writeback data transfers on a bus |
07/13/1999 | US5923855 Multi-processor system and method for synchronizing among processors with cache memory having reset state, invalid state, and valid state |
07/13/1999 | US5923839 Data storage system, data transfer method, and data reconstruction method |
07/13/1999 | US5923827 Facsimile apparatus using a memory management device having empty memory block maintenance function |
07/13/1999 | US5923612 Synchronous semiconductor memory device having macro command storage and execution method therefor |
07/13/1999 | US5923601 In an integrated circuit |
07/13/1999 | US5923485 Storage device for reliably maintaining data in a reproducible state for a long period of time |
07/13/1999 | US5923276 For a set associative cache |
07/13/1999 | US5922073 System and method for controlling access to subject data using location data associated with the subject data and a requesting device |
07/13/1999 | US5922054 System for managing external applications and files |
07/13/1999 | CA2145363C Ram interface |
07/13/1999 | CA2118662C Memory controller having all dram address and control signals provided synchronously from a single device |
07/13/1999 | CA2118297C Distributed cryptographic object method |
07/08/1999 | WO1999034571A1 Http session control |
07/08/1999 | WO1999034356A2 Disk cache enhancer with dynamically sized read request based upon current cache hit rate |
07/08/1999 | WO1999034295A1 Computer cache memory windowing |
07/08/1999 | WO1999034294A1 Optimal multi-channel memory controller system |
07/08/1999 | WO1999034293A1 Accelerated graphics port for multiple memory controller computer system |
07/08/1999 | WO1999034291A1 Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner |
07/08/1999 | WO1999034286A1 Method and apparatus capable of embedding, extracting and processing data within a file having an html format |
07/08/1999 | WO1999034283A1 Method and apparatus to select the next instruction in a very long instruction word computer |
07/08/1999 | WO1999027455B1 Data resampler for data processing system |
07/08/1999 | WO1999009513A3 Computer partition manipulation during imaging |
07/08/1999 | CA2316239A1 Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner |
07/08/1999 | CA2315640A1 Method and apparatus capable of embedding, extracting and processing data within a file having an html format |
07/08/1999 | CA2282373A1 Computer cache memory windowing |
07/07/1999 | EP0927942A2 Methods and apparatus for high-speed access to and sharing of storage devices on a networked digital data processing system |
07/07/1999 | EP0927940A1 Database and method for building a database |
07/07/1999 | EP0927937A1 Method and computer system for processing a data stream |
07/07/1999 | EP0927936A2 A microprocessor with configurable on-chip memory |
07/07/1999 | EP0927935A1 Memory structure with groups of memory banks and serializing means |
07/07/1999 | EP0927934A1 File managing device, file managing method, and recording medium stored with file managing program |
07/07/1999 | EP0927930A1 Method & apparatus to select the next instruction in a very long instruction word computer |
07/07/1999 | EP0927929A2 Direct vectored legacy instruction set emulation |
07/07/1999 | EP0927921A2 Data access control apparatus for limiting data access in accordance with user attribute |
07/07/1999 | EP0927396A1 Memory bus termination module |
07/07/1999 | EP0927393A1 Digital signal processing integrated circuit architecture |
07/07/1999 | EP0927387A2 Method and apparatus for efficient memory-read operations with a vga-compliant video display adaptor |
07/07/1999 | EP0823087B1 Methods and apparatus for performing heap management and protecting data structure integrity in non-volatile memory |
07/07/1999 | CN1222272A Method and appts. for data processing |
07/07/1999 | CN1222242A Network based access system |
07/07/1999 | CN1221915A Access control of general computer, its software copyright protector and method |
07/06/1999 | US5920900 Hash-based translation method and apparatus with multiple level collision resolution |
07/06/1999 | US5920898 Memory control unit providing optimal timing of memory control sequences between different memory segments by optimally selecting among a plurality of memory requests |
07/06/1999 | US5920895 Mapped file input/output with delayed zeroing |
07/06/1999 | US5920894 Control circuit for generating control signals for controlling read and write accesses to a memory |
07/06/1999 | US5920893 Storage control and computer system using the same |
07/06/1999 | US5920891 Architecture and method for controlling a cache memory |
07/06/1999 | US5920890 Distributed tag cache memory system and method for storing data in the same |
07/06/1999 | US5920889 Apparatus and method for write miss processing in a copy-back data cache with an allocating load buffer and a non-allocating store buffer |
07/06/1999 | US5920888 Cache memory system having high and low speed and power consumption modes in which different ways are selectively enabled depending on a reference clock frequency |
07/06/1999 | US5920887 Disk drive with cache repeatedly accessed for a read command to provide prefetched data |
07/06/1999 | US5920881 Computer bridge |
07/06/1999 | US5920876 Performing exact garbage collection using bitmaps that identify pointer values within objects |
07/06/1999 | US5920870 For use in a computer system |
07/06/1999 | US5920869 Database management system |
07/06/1999 | US5920861 Techniques for defining using and manipulating rights management data structures |