Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
08/1999
08/18/1999EP0936555A2 Cache coherency protocol with independent implementation of optimised cache operations
08/18/1999EP0936554A2 Cache coherency protocol including a hovering (H) state having a precise mode and an imprecise mode
08/18/1999EP0936553A2 Cache coherency protocol with tagged state and historical information
08/18/1999EP0936552A2 Pseudo precise I-cache inclusivity for vertical caches
08/18/1999EP0936551A1 A hierarchical bus simple coma architecture for shared memory multiprocessors
08/18/1999EP0936548A1 Automatic system recovery
08/18/1999EP0936543A2 Program transformation method and program transformation system
08/18/1999EP0936542A2 Detection of out of order instruction execution
08/18/1999EP0936538A2 Method and apparatus for speculative execution of load operations for misaligned data
08/18/1999EP0936534A2 Recording device
08/18/1999EP0935797A1 Computer system with switch and controller unit for allocating internal and external memory channels among a plurality of subsystems
08/18/1999EP0935781A1 Method for allocating memory in a multiprocessor data processing system
08/18/1999CN1226035A Hierarchical bus simple COMA architecture only having cache storage
08/18/1999CN1226034A Named bookmark sets
08/18/1999CN1226031A HTTP caching proxy to filter and control display of data in web browser
08/18/1999CN1226030A Apparatus and method for formating web page
08/18/1999CN1226024A Method and apparatus for loading instruction buffer
08/18/1999CN1226023A Load/load detection and reorder method
08/17/1999US5940877 Cache address generation with and without carry-in
08/17/1999US5940875 Address pattern generator for burst address access of an SDRAM
08/17/1999US5940873 Address-translation method and system for translating effective addresses into physical addressee in computers
08/17/1999US5940872 Software and hardware-managed translation lookaside buffer
08/17/1999US5940871 Computer system and method for selectively decompressing operating system ROM image code using a page fault
08/17/1999US5940870 Address translation for shared-memory multiprocessor clustering
08/17/1999US5940869 System and method for providing shared memory using shared virtual segment identification in a computer system
08/17/1999US5940868 Large memory allocation method and apparatus
08/17/1999US5940864 Shared memory-access priorization method for multiprocessors using caches and snoop responses
08/17/1999US5940863 Apparatus for de-rotating and de-interleaving data including plural memory devices and plural modulo memory address generators
08/17/1999US5940860 Methods and apparatus for substantially memory-less coherence transformer for connecting computer node coherence domains
08/17/1999US5940858 For use in a processor
08/17/1999US5940857 Instruction cache memory apparatus with advanced read function that predicts whether to read out a next instruction block including an address register, a counter and a selector
08/17/1999US5940856 Cache intervention from only one of many cache lines sharing an unmodified value
08/17/1999US5940855 System and method for determining relative cache performance in a computer system
08/17/1999US5940850 System and method for selectively enabling load-on-write of dynamic ROM data to RAM
08/17/1999US5940848 Computer system and method for efficiently controlling the opening and closing of pages for an aborted row on page miss cycle
08/17/1999US5940838 Parallel file system and method anticipating cache usage patterns
08/17/1999US5940837 Distributed data base system
08/17/1999US5940832 Dynamic database structuring method and apparatus, and database clustering method and apparatus
08/17/1999US5940831 Hypermedia system and method of managing directories and directory data originating from a node link structure in a directory server
08/17/1999US5940827 Computer implemented method
08/17/1999US5940799 System and method for securing speech transactions
08/17/1999US5940614 Hypertext control method and apparatus for displaying help information in an interactive data processing system
08/17/1999US5940613 Method for creating a single binary virtual device driver for a windowing operating system
08/17/1999US5940587 System and method for trap address mapping for fault isolation
08/17/1999US5940383 Automatic data service selection
08/17/1999US5940342 Multi-bank DRAM suitable for integration with processor on common semiconductor chip
08/17/1999US5940336 Reference clock generating circuit in memory to be asynchronously precharged and activated
08/17/1999US5940334 Memory interface circuit including bypass data forwarding with essentially no delay
08/17/1999US5940289 Parallel database system retrieval method of a relational database management system using initial data retrieval query and subsequent sub-data utilization query processing for minimizing query time
08/17/1999US5940090 Method and apparatus for internally caching the minimum and maximum XY pixel address values in a graphics subsystem
08/17/1999US5940067 Reduced memory indexed color graphics system for rendered images with shading and fog effects
08/17/1999US5938739 Memory controller including write posting queues, bus read control logic, and a data contents counter
08/17/1999US5938734 Real time stream server for handling a plurality of real time stream data with different data rates
08/17/1999US5938730 Method of managing software by transmitted data on network
08/17/1999CA2260285A1 Pseudo precise i-cache inclusivity for vertical caches
08/17/1999CA2075048C Networked facilities management system
08/17/1999CA2065832C Recording device having short data writing time
08/12/1999WO1999040538A1 Device with integrated circuit made secure by attenuation of electric signatures
08/12/1999WO1999040516A1 Disk cache control method, disk array device, and storage device
08/12/1999WO1999040515A1 Real time dram page boundary adjustment
08/12/1999WO1999040514A1 Optimized network resource location
08/12/1999WO1999040509A2 System and method for website development
08/12/1999CA2319557A1 System and method for website development
08/11/1999EP0935374A1 Dynamic and consistent naming of fabric attached storage
08/11/1999EP0935255A2 Flash EEPROM system
08/11/1999EP0935221A2 Remote authentication system
08/11/1999EP0935186A1 Volume set configuration using a single operational view
08/11/1999EP0934571A1 Data distribution system
08/11/1999EP0934565A1 A digital information library and delivery system
08/11/1999EP0934564A1 Memory management with compaction of data blocks
08/11/1999EP0934560A2 Apparatus and method for secure device addressing
08/11/1999EP0808487B1 Apparatus and method for entering and executing test mode operations for memory
08/11/1999EP0677189A4 Architecture of output switching circuitry for frame buffer.
08/11/1999EP0587885B1 Fault tolerant change distribution method in a distributed database system
08/11/1999CN1225739A Cryptographic method, apparatus and systems for storage media electronic rights management in closed and connected appliances
08/11/1999CN1225492A High speed semiconductor memory device
08/11/1999CN1225480A Ease of use interface to hotspots in hypertext document pages in network display stations
08/11/1999CN1225479A Customization of web pages based on requester type
08/11/1999CN1225477A Method and system for early slave forwarding of strictly ordered bus operations
08/11/1999CN1225476A Method for quick protection and recovery for hard disc data of computer
08/11/1999CN1225475A Method for protection of hard disc based on computer main board fixation memory device
08/11/1999CN1225469A Method and apparatus to select next instruction in superscalar or very long instruction word computer having N-way branching
08/10/1999US5937437 Method and apparatus for monitoring address translation performance
08/10/1999US5937436 Network interface circuit including an address translation unit and flush control circuit and method for checking for invalid address translations
08/10/1999US5937434 Method of managing a symmetrically blocked nonvolatile memory having a bifurcated storage architecture
08/10/1999US5937433 Method of controlling hard disk cache to reduce power consumption of hard disk drive used in battery powered computer
08/10/1999US5937431 Multi- node, multi-level cache- only memory architecture with relaxed inclusion
08/10/1999US5937429 Cache memory having a selectable cache-line replacement scheme using cache-line registers in a ring configuration with a token indicator
08/10/1999US5937427 Information recording apparatus and method capable of efficient erase, write and verify processes
08/10/1999US5937426 Disk drive selectively controlled to provide cache scan before seek
08/10/1999US5937425 Flash file system optimized for page-mode flash technologies
08/10/1999US5937424 Method and apparatus for suspending the writing of a nonvolatile semiconductor memory with program suspend command
08/10/1999US5937406 File system interface to a database
08/10/1999US5937405 On-line database updating network system and method
08/10/1999US5937367 Method for testing a memory chip, divided into cell arrays, during ongoing operation of a computer while maintaining real-time conditions
08/10/1999US5937203 Port for fine tuning a central processing unit
08/10/1999US5937174 Scalable hierarchial memory structure for high data bandwidth raid applications
08/10/1999US5937172 Apparatus and method of layering cache and architectural specific functions to permit generic interface definition
08/10/1999US5937166 Method and apparatus for information processing
08/10/1999US5937157 Information processing apparatus and a control method
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