Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
04/1999
04/21/1999EP0910089A2 Storage circuit having backup function and information processing apparatus
04/21/1999EP0910028A1 Personal electronic settlement system, its terminal, and management apparatus
04/21/1999EP0909414A1 Internet hyperlink drag and drop
04/21/1999EP0839350B1 Optimized synchronisation procedure
04/21/1999CN1214792A Circuit arrangement with plurality of electronic circuit components
04/21/1999CN1043094C Method for optimizing memory space in data base
04/20/1999US5896548 Data transferring system having foreground and background modes and upon detecting significant pattern of access in foreground mode to change background mode control parameters
04/20/1999US5896545 Transmitting memory requests for multiple block format memory operations the requests comprising count information, a mask, and a second mask
04/20/1999US5896539 Method and system for controlling access to a shared resource in a data processing system utilizing dynamically-determined weighted pseudo-random priorities
04/20/1999US5896520 Virtual computer system of multi-processor constitution
04/20/1999US5896517 High performance processor employing background memory move mechanism
04/20/1999US5896511 Method and apparatus for providing buffer state flow control at the link level in addition to flow control on a per-connection basis
04/20/1999US5896505 Data transfer system and method for dividing an original data read instruction into individual read demands for each data element
04/20/1999US5896501 Multiprocessor system and parallel processing method for processing data transferred between processors
04/20/1999US5896492 Maintaining data coherency between a primary memory controller and a backup memory controller
04/20/1999US5896404 Programmable burst length DRAM
04/20/1999US5896397 Method and device for error protection of programmable memories
04/20/1999US5896346 High speed and low cost SDRAM memory subsystem
04/20/1999US5896312 Programmable metallization cell structure and method of making same
04/20/1999US5895503 Address translation method and mechanism using physical address information including during a segmentation process
04/20/1999US5895502 Data writing and reading method for a frame memory having a plurality of memory portions each having a plurality of banks
04/20/1999US5895501 Virtual memory system for vector based computer systems
04/20/1999US5895500 Data processing system with reduced look-up table for a function with non-uniform resolution
04/20/1999US5895499 Cross-domain data transfer using deferred page remapping
04/20/1999US5895496 System for an method of efficiently controlling memory accesses in a multiprocessor computer system
04/20/1999US5895495 Demand-based larx-reserve protocol for SMP system buses
04/20/1999US5895493 Method and apparatus for storage of multiple host storage management information on a storage subsystem
04/20/1999US5895490 Computer system cache performance on write allocation cycles by immediately setting the modified bit true
04/20/1999US5895489 Memory management system including an inclusion bit for maintaining cache coherency
04/20/1999US5895488 Cache flushing methods and apparatus
04/20/1999US5895487 Integrated processing and L2 DRAM cache
04/20/1999US5895486 Method and system for selectively invalidating cache lines during multiple word store operations for memory coherence
04/20/1999US5895485 Method and device using a redundant cache for preventing the loss of dirty data
04/20/1999US5895484 Method and system for speculatively accessing cache memory data within a multiprocessor data-processing system using a cache controller
04/20/1999US5895481 Programmable VESA unified memory architecture (VUMA) row address strobe (RAS)
04/20/1999US5895480 Method of and means for accessing an address by respectively substracting base addresses of memory integrated circuits from an access address
04/20/1999US5895469 System for reducing access times for retrieving audio samples and method therefor
04/20/1999US5895467 Selectively switching memory access permission for manipulating data in a database
04/20/1999US5895462 Information service terminal for accessing information from a network based on user channel selections
04/15/1999WO1999018730A2 Multithread data processor
04/15/1999WO1999018522A1 Knowledge provider with logical hyperlinks
04/15/1999WO1999018519A1 Method for processing hyperlink information
04/15/1999WO1999018511A1 Method and apparatus for providing execution of system management mode services in virtual mode
04/15/1999WO1999018510A1 I/o forwarding in a cache coherent shared disk computer system
04/15/1999WO1999018509A1 Moving sequential sectors within a block of information in a flash memory mass storage architecture
04/15/1999WO1999018507A1 Hybrid data storage and reconstruction system and method for a data storage device
04/15/1999WO1999018506A1 Method and apparatus for targeting a digital information playback device
04/15/1999WO1999018505A1 System and method for transferring one-to-many disk image among computers in a network
04/15/1999WO1999018504A1 Secure memory having multiple security levels
04/15/1999WO1999009704A3 Method and apparatus for representing and applying network topological data
04/15/1999WO1999005617A3 Structure for a data-base
04/15/1999WO1999005586A3 A method of storing elements in a database
04/15/1999WO1999005585A3 A method relating to databases
04/15/1999WO1998050838A3 A method and system for providing on-line interactivity over a server-client network
04/15/1999WO1998043176A8 Shared reconfigurable memory architectures for digital signal processing
04/15/1999CA2305592A1 Method for processing hyperlink information
04/15/1999CA2303348A1 Secure memory having multiple security levels
04/14/1999EP0909091A1 Memory manager
04/14/1999EP0908892A2 Semiconductor integrated circuit device
04/14/1999EP0908891A2 Circuit for processing access conflicts
04/14/1999EP0908890A2 Semiconductor integrated circuit device
04/14/1999EP0908889A2 Semiconductor integrated circuit device
04/14/1999EP0908888A2 Semiconductor integrated circuit device
04/14/1999EP0908887A2 Semiconductor integrated circuit device
04/14/1999EP0908886A2 Semiconductor integrated circuit device
04/14/1999EP0908832A2 A transmission document edition device, a received document processing device, a server device in a communication document processing system, and a computer-readable record medium that stores the function
04/14/1999EP0908829A1 Distributed memory access control system and method
04/14/1999EP0908828A1 Distributed access control system for memory and method
04/14/1999EP0908826A2 Packet protocol and distributed burst engine
04/14/1999EP0908825A1 A data-processing system with cc-NUMA (cache coherent, non-uniform memory access) architecture and remote access cache incorporated in local memory
04/14/1999EP0908811A2 Printer control unit, method of controlling said unit and record medium with a recorded program for controlling the same
04/14/1999EP0908810A2 Secure processor with external memory using block chaining and block re-ordering
04/14/1999EP0907922A1 Inter-bus bridge circuit
04/14/1999EP0907917A1 Cache memory controller in a raid interface
04/14/1999EP0892947A4 A proxy-server system for enhancing functionality of computers accessing servers on the internet
04/14/1999EP0827609B1 Add-in board with enable/disable expansion rom for pci bus computers and corrresponding interface
04/14/1999EP0765498A4 Flash memory based main memory
04/14/1999EP0673527B1 A method for optimizing memory space in a data base
04/14/1999EP0608344B1 System for backing-up data for rollback
04/14/1999EP0568649B1 Method of selecting and representing time-varying data
04/14/1999CN1213800A Determining how changes to underlying data affect cached objects
04/13/1999US5894564 System for identifying memory segment bounded by previously accessed memory locations within data block and transferring thereof only when the segment has been changed
04/13/1999US5894555 Apparatus and method for managing shared resources
04/13/1999US5894554 System for managing dynamic web page generation requests by intercepting request at web server and routing to page server thereby releasing web server to process other requests
04/13/1999US5894550 Method of implementing a secure program in a microprocessor card, and a microprocessor card including a secure program
04/13/1999US5893931 Lookaside buffer for address translation in a computer system
04/13/1999US5893930 Predictive translation of a data address utilizing sets of associative entries stored consecutively in a translation lookaside buffer
04/13/1999US5893929 Mutually controlled match-line-to-word-line transfer circuit
04/13/1999US5893923 Microcontroller utilizing a circuit to select during reset process an internal or external memory as base memory
04/13/1999US5893922 Home node migration for distributed shared memory systems
04/13/1999US5893921 Method for maintaining memory coherency in a computer system having a cache utilizing snoop address injection during a read transaction by a dual memory bus controller
04/13/1999US5893920 System and method for cache management in mobile user file systems
04/13/1999US5893918 System and method for rotational position sensing miss avoidance in direct access storage devices
04/13/1999CA2148180C Method for allocating high memory in a personal computer
04/10/1999CA2249554A1 Secure processor with external memory using block chaining and block re-ordering
04/08/1999WO1999017232A1 Object model mapping and runtime engine for employing relational database with object oriented software
04/08/1999WO1999017227A1 Method and system for prefetching information
04/08/1999WO1999017208A1 Multiple data controllers with centralized cache
04/08/1999WO1999017203A1 Highly-available cluster configuration database
04/08/1999WO1999017198A1 A method for strong partitioning of a multi-processor vme backplane bus