Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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10/06/1999 | CN1231042A Security module comprising means generating links between main files and auxiliary files |
10/06/1999 | CN1230722A Uncoupling central processing unit from its associated hardware for interaction with data handling apparatus alien to operating system controlling said unit and hardware |
10/06/1999 | CN1230721A Cache coherency protocol having hovering (H) state for instructions and data |
10/05/1999 | US5963984 Address translation unit employing programmable page size |
10/05/1999 | US5963983 Method and apparatus for dynamically creating conversion tables to access a semiconductor memory device |
10/05/1999 | US5963982 Defragmentation of stored data without pointer indirection |
10/05/1999 | US5963980 Microprocessor-based memory card that limits memory accesses by application programs and method of operation |
10/05/1999 | US5963979 System for updating inactive system memory using dual port memory |
10/05/1999 | US5963978 High level (L2) cache and method for efficiently updating directory entries utilizing an n-position priority queue and priority indicators |
10/05/1999 | US5963976 System for configuring a duplex shared storage |
10/05/1999 | US5963975 Single chip integrated circuit distributed shared memory (DSM) and communications nodes |
10/05/1999 | US5963974 Cache intervention from a cache line exclusively holding an unmodified value |
10/05/1999 | US5963973 Multiprocessor computer system incorporating method and apparatus for dynamically assigning ownership of changeable data |
10/05/1999 | US5963972 Memory architecture dependent program mapping |
10/05/1999 | US5963971 Method and apparatus for handling audit requests of logical volumes in a virtual media server |
10/05/1999 | US5963952 Internet browser based data entry architecture |
10/05/1999 | US5963937 Format conversion of storage data using an efficient division of data |
10/05/1999 | US5963725 Simulation system and method for microcomputer program |
10/05/1999 | US5963721 Microprocessor system with capability for asynchronous bus transactions |
10/05/1999 | US5963718 Method and apparatus for correcting error in control field in cache memory |
10/05/1999 | US5963642 Method and apparatus for secure storage of data |
10/05/1999 | US5963504 Address transition detection in a synchronous design |
10/05/1999 | US5963498 Method for controlling memory address of digital signal processor |
10/05/1999 | US5963481 Integrated circuit |
10/05/1999 | US5963474 Secondary storage device using nonvolatile semiconductor memory |
10/05/1999 | US5963339 Facsimile apparatus capable of editing and transmitting input information |
10/05/1999 | US5963154 In a video decoding and decompression system |
10/05/1999 | US5963142 Security control for personal computer |
10/05/1999 | US5961651 Event notification in a computing system having a plurality of storage devices |
10/05/1999 | US5961602 Method for optimizing off-peak caching of web data |
10/05/1999 | US5961601 Computerized method |
10/05/1999 | US5961595 Network management system with a hardware resource management module shared between networks |
10/05/1999 | US5961581 Method and circuit for detecting address limit violations in a microprocessor-based computer |
10/05/1999 | CA2145223C Huffman decoder |
10/05/1999 | CA2145218C Prediction filter |
10/01/1999 | CA2267870A1 A linear surface memory to spatial tiling algorithm/mechanism |
10/01/1999 | CA2267491A1 Frame buffer memory system for reducing page misses when rendering with color and z buffers |
09/30/1999 | WO1999049470A1 Flash memory leveling architecture having no external latch |
09/30/1999 | WO1999049416A1 Devices for hiding operations performed in a microprocessor card |
09/30/1999 | WO1999049395A1 Buffer memory controller |
09/30/1999 | WO1999008173A3 Object oriented data storage device |
09/30/1999 | DE19810843A1 Verfahren und Zugriffseinrichtung zum Bestimmen der Speicheradresse eines Datenwerts in einer Speichereinrichtung A method and access means for determining the memory address of a data value in a memory device |
09/30/1999 | CA2323006A1 Devices for hiding operations performed in a microprocessor card |
09/29/1999 | EP0946044A2 Digital camera |
09/29/1999 | EP0945806A1 Supervisory circuit for semiconductor integrated circuit |
09/29/1999 | EP0945805A1 A cache coherency mechanism |
09/29/1999 | EP0945801A2 External storage device and method for data saving, data backup |
09/29/1999 | EP0945798A2 High speed remote storage cluster interface controller |
09/29/1999 | EP0945783A2 Variable length register device |
09/29/1999 | EP0945776A2 Data transfer circuit for semiconductor integrated circuit |
09/29/1999 | EP0945706A2 Memory management for navigation system |
09/29/1999 | EP0945029A1 System for maintaining datastream continuity in the presence of disrupted source data |
09/29/1999 | EP0945028A1 Parallel decompressors for recompressed pixel data within an mpeg decoder |
09/29/1999 | EP0945027A1 Video decoder with interleaved data processing |
09/29/1999 | EP0945025A1 Parallel compressors for recompression of interleaved pixel data within an mpeg decoder |
09/29/1999 | EP0945022A1 Efficient fixed-length block compression and decompression |
09/29/1999 | EP0945001A1 A multiple format video signal processor |
09/29/1999 | EP0944980A1 Method and system for improving security in network applications |
09/29/1999 | EP0944959A2 Method and apparatus for n choose m device selection |
09/29/1999 | EP0944880A1 Security module comprising means generating links between main files and auxiliary files |
09/29/1999 | EP0944873A1 Internet file system |
09/29/1999 | EP0829046B1 Method and system for setting up user programs as well as user computer in a computer net |
09/29/1999 | EP0681238B1 Raid level 5 with free blocks parity cache |
09/29/1999 | EP0651895B1 Sequential information integration service for integrating transfer of files or other data entities between a plurality of program modules and a storage in a computer |
09/29/1999 | EP0635149B1 Method and apparatus for storing and retrieving multi-dimensional data in computer memory |
09/29/1999 | CN1229999A Semiconductor memory device, and method of checking the semiconductor device and method of using the same |
09/29/1999 | CN1229989A Date recorder and data producing circuit |
09/29/1999 | CN1229963A Storage managing method and its device and portable electronic device used for same device |
09/29/1999 | CN1229952A Data transfer circuit for semiconductor integrated circuit |
09/29/1999 | CN1229951A Cache coherency protocol with tagged state and historical information |
09/29/1999 | CN1229950A DCBST with ICBI mechanism |
09/29/1999 | CN1229946A Instruction memory circuit |
09/29/1999 | CN1229945A File updating method capable of updating operation file without interrupting online processing |
09/28/1999 | US5960467 Apparatus for efficiently providing memory operands for instructions |
09/28/1999 | US5960466 Computer address translation using fast address generator during a segmentation operation performed on a virtual address |
09/28/1999 | US5960465 Apparatus and method for directly accessing compressed data utilizing a compressed memory address translation unit and compression descriptor table |
09/28/1999 | US5960464 Memory sharing architecture for a decoding in a computer system |
09/28/1999 | US5960463 Cache controller with table walk logic tightly coupled to second level access logic |
09/28/1999 | US5960462 Method and apparatus for analyzing a main memory configuration to program a memory controller |
09/28/1999 | US5960461 Multiprocessor digital data processing system/shared memory multiprocessor system and method of operation |
09/28/1999 | US5960458 Shared memory system |
09/28/1999 | US5960457 Cache coherency test system and methodology for testing cache operation in the presence of an external snoop |
09/28/1999 | US5960456 Method and apparatus for providing a readable and writable cache tag memory |
09/28/1999 | US5960455 Scalable cross bar type storage controller |
09/28/1999 | US5960453 Word selection logic to implement an 80 or 96-bit cache SRAM |
09/28/1999 | US5960450 System and method for accessing data between a host bus and system memory buses in which each system memory bus has a data path which is twice the width of the data path for the host bus |
09/28/1999 | US5960216 Method and apparatus for interfacing two remotely disposed devices coupled via a transmission medium |
09/28/1999 | US5960195 Intelligent volatile memory initialization |
09/28/1999 | US5960189 Automatic computer upgrading |
09/28/1999 | US5960179 Method and apparatus extending coherence domain beyond a computer system bus |
09/28/1999 | US5960087 Distributed garbage collection system and method |
09/28/1999 | US5959937 Dual clocking scheme in a multi-port RAM |
09/28/1999 | US5959923 Digital computer having a system for sequentially refreshing an expandable dynamic RAM memory circuit |
09/28/1999 | US5959639 Computer graphics apparatus utilizing cache memory |
09/28/1999 | US5959276 Issuing customized IC cards of different types |
09/28/1999 | US5958079 Memory card with error correction scheme requiring reducing memory capacity |
09/28/1999 | US5958078 Storage unit and storage unit subsystem |
09/28/1999 | US5958068 Cache array defect functional bypassing using repair mask |
09/28/1999 | US5958045 Start of access instruction configured to indicate an access mode for fetching memory operands in a microprocessor |
09/28/1999 | US5958040 Adaptive stream buffers |