Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
09/2010
09/14/2010US7795916 Level shift circuit
09/14/2010US7795915 Multi-level signaling
09/14/2010US7795914 Circuit design methodology to reduce leakage power
09/14/2010US7795913 Programmable latch based multiplier
09/14/2010US7795912 Circuit comprising a matrix of programmable logic cells
09/14/2010US7795911 Programmable gate array, switch box and logic unit for such an array
09/14/2010US7795909 High speed programming of programmable logic devices
09/14/2010US7795908 Electronic device, method for configuring reprogrammable logic element, computer-readable medium, computer data signal and image forming apparatus
09/14/2010US7795907 Apparatus of low power, area efficient FinFET circuits and method for implementing the same
09/14/2010US7795906 Leakage power management with NDR isolation devices
09/14/2010US7795904 Switching circuit having a driver for providing a linear voltage transition
09/14/2010US7795903 Output buffer and method having a supply voltage insensitive slew rate
09/14/2010US7795902 Integrated circuit device with slew rate controlled output buffer
09/14/2010US7795901 Automatic isolation of a defect in a programmable logic device
09/14/2010US7795900 Memory array with multiple-event-upset hardening
09/14/2010US7795899 Enabling on-chip features via efuses
09/14/2010CA2647233C Anti-fuse memory cell
09/10/2010WO2010100693A1 Semiconductor integrated circuit
09/10/2010WO2009135226A3 Clock gating system and method
09/09/2010US20100225356 Latch circuit
09/09/2010US20100225355 Current-controlled CMOS logic family
09/09/2010US20100225354 Lookup table, semiconductor integrated circuit, method for making lookup table and method for making semiconductor integrated circuit
09/09/2010US20100225353 Methods and systems for reducing clock skew in a gated clock tree
09/09/2010US20100225352 Integrated circuit with pin-selectable mode of operation and level-shift functionality and related apparatus, system, and method
09/09/2010US20100225351 Resolving Mestastability
09/09/2010US20100225350 Reconfigurable magnetic logic-circuit array and methods for producing and operating such logic devices
09/08/2010EP2226941A2 Programmable high-speed I/O interface
09/08/2010CN1893404B Serial communication method and interface circuit
09/08/2010CN1855902B Signal transmission system
09/08/2010CN101828367A Receiving circuit and receiving system
09/08/2010CN101828121A Logical value determination method and logical value determination program
09/08/2010CN101826866A Programmable signal routing systems having low static leakage
09/08/2010CN101826865A Output stage circuit of interface device with overvoltage and reverse voltage protection functions and realization way thereof
09/08/2010CN101826864A Level shift device
09/08/2010CN101826859A Signal source device and signal source device used for generating output signal
09/08/2010CN101826065A Universal serial bus (USB) signal conversion interface circuit
09/08/2010CN101825916A Computer system
09/08/2010CN101431328B NOT gate logic circuit and its forming method
09/08/2010CN101238641B Semiconductor integrated circuit
09/07/2010US7793132 Integrated circuit having frequency dependent noise avoidance
09/07/2010US7791376 Logic circuit using metal-insulator transition (MIT) device
09/07/2010US7791375 DQS re sync calibration
09/07/2010US7791374 Apparatus and method of adjusting driving voltage for selective pre-charge
09/07/2010US7791373 Semiconductor device and display device
09/07/2010US7791372 Level shifter and level shifting method thereof
09/07/2010US7791371 Level shift circuit and power semiconductor device
09/07/2010US7791370 Clock distribution techniques for channels
09/07/2010US7791369 Semiconductor integrated circuit and operation method of the same
09/07/2010US7791368 Method and apparatus for regulating a power supply of an integrated circuit
09/07/2010US7791367 Driver with selectable output impedance
09/07/2010US7791365 Remotely configurable chip and associated method
09/07/2010US7791250 Method for ultra-fast controlling of a magnetic cell and related devices
09/07/2010US7789558 Thermal sensing circuit using bandgap voltage reference generators without trimming circuitry
09/02/2010WO2010099448A2 Logic based on the evolution of nonlinear dynamical systems
09/02/2010WO2010099442A2 Reconfigurable and reliable logic circuit elements that exploit nonlinearity and noise
09/02/2010WO2010098942A1 Common-mode noise reduction circuit in a field device
09/02/2010WO2010098901A2 Synthetic pulse generator for reducing supply noise
09/02/2010WO2010097514A1 A method for secure remote reconfiguration of the programmable low-cost fpga hardware
09/02/2010WO2010079326A3 Communication within an integrated circuit including an array of interconnected programmable logic elements
09/02/2010WO2007027833A3 Circuit, system and multiplexing signals with reduced jitter
09/02/2010US20100219862 Reconfigurable and reliable logic circuit elements that exploit nonlinearity and noise
09/02/2010US20100219861 Integrated Circuit with Improved Logic Cells
09/02/2010US20100219860 Integrated Circuit with Improved Logic Cells
09/02/2010US20100219859 Non-Sequentially Configurable IC
09/02/2010US20100219858 Logic based on the evolution of nonlinear dynamical systems
09/02/2010US20100219857 Low power consumption mis semiconductor device
09/02/2010US20100219856 Output buffer circuit and differential output buffer circuit, and transmission method
09/02/2010CA2752925A1 Common-mode noise reduction circuit in a field device
09/01/2010EP2224344A1 A combined processing and non-volatile memory unit array
09/01/2010EP1303914B1 Circuit for generating an inverse signal of a digital signal with a minimal delay difference between the inverse signal and the digital signal
09/01/2010CN201571041U Electrical level transfer circuit realized based on high-voltage DMOS
09/01/2010CN201571040U Micro-band type four-input two-output hybrid ring
09/01/2010CN201570024U Reconfigurable SoC based on field programmable logic
09/01/2010CN1918795B Latch circuit
09/01/2010CN1856935B Circuit for providing a logic gate function and a latch function
09/01/2010CN1795428B 监测和控制功耗 Monitoring and control of power
09/01/2010CN101821949A Method of and circuit for suppressing noise in circuit
09/01/2010CN101821948A Clock circuit with clock transfer capability and method
09/01/2010CN101820278A Fracturable lookup table and logic element
09/01/2010CN101820277A Apparatus and methods for programmable power-up sequence
09/01/2010CN101431330B NOR gate logic circuit and its forming method
09/01/2010CN101232282B Dead-time compensation method for electric drives
09/01/2010CN101153892B Verification method for field programmable gate array input/output module
09/01/2010CN101123431B Current mode logic-cmos converter
09/01/2010CN101060323B Clocked inverter, nand, nor and shift resister
08/2010
08/31/2010USRE41598 Impedance matching circuit
08/31/2010US7788478 Accessing multiple user states concurrently in a configurable IC
08/31/2010US7786762 Generic buffer circuits and methods for out of band signaling
08/31/2010US7786761 Output buffer device
08/31/2010US7786760 I/O buffer circuit
08/31/2010US7786759 Bidirectional signal interface and related system and method
08/31/2010US7786758 Asynchronous clock gate with glitch protection
08/31/2010US7786756 Method and system for latchup suppression
08/31/2010US7786753 Output driver circuit, semiconductor memory device including the output driver circuit, and method for operating the semiconductor memory device
08/31/2010US7786752 Memory systems, on-die termination (ODT) circuits, and method of ODT control
08/31/2010US7786751 Differential signaling system and method of controlling skew between signal lines thereof
08/31/2010US7786749 Programmable integrated circuit having built in test circuit
08/31/2010US7786748 Method and apparatus for signal inversion in superconducting logic gates
08/26/2010WO2010095819A2 Liquid crystal display driving circuit with less current consumption
08/26/2010US20100214000 Systems and Methods for Driving High Power Stages Using Lower Voltage Processes
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