Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
10/2010
10/14/2010US20100259299 Voltage conversion and integrated circuits with stacked voltage domains
10/14/2010US20100259298 Low-quiescent-current buffer
10/14/2010US20100259297 Quad state logic design methods, circuits, and systems
10/14/2010US20100259296 Method for fabrication of a semiconductor device and structure
10/14/2010US20100259295 Calibration Methods and Circuits to Calibrate Drive Current and Termination Impedance
10/14/2010US20100259294 On-die termination latency clock control circuit and method of controlling the on-die termination latency clock
10/14/2010US20100259293 Bus Terminating Part
10/13/2010EP2239851A1 Router and method of routing with redundancy
10/13/2010EP2239848A2 Hardening of self-timed circuits against glitches
10/13/2010EP2238687A1 Integrated circuit including a large number of identical elementary circuits powered in parallel
10/13/2010EP2238686A1 Electronic clamps for integrated circuits and methods of use
10/13/2010CN201608703U 低输入电流光电耦合器 Low Input Current Optocouplers
10/13/2010CN201608702U 一种基于lxi总线的功率开关 Based lxi bus power switch
10/13/2010CN1841931B Tolerant input circuit
10/13/2010CN1700601B Logic circuit apparatus
10/13/2010CN1681207B Output driver circuit having adjustable swing width during testing mode operation
10/13/2010CN101861615A Thin-film transistor circuit, driving method thereof, and light-emitting display apparatus
10/13/2010CN101860366A Highly configurable PLL architecture for programmable logic device
10/13/2010CN101860364A System and method for observing threshold voltage variations
10/13/2010CN101860357A Method for weight control and information integration by utilizing time encoding
10/13/2010CN101860356A Level shifters, integrated circuits, systems, and method for operating the level shifters
10/13/2010CN101510774B Mixing voltage output circuit
10/13/2010CN101171680B Electrostatic breakdown protection circuit and semiconductor integrated circuit device provided with same
10/13/2010CN101169926B Liquid crystal display device for reducing noise and drive device thereof
10/12/2010US7814402 Method and apparatus for digit-serial communications for iterative digital processing algorithms
10/12/2010US7814243 Shared storage for multi-threaded ordered queues in an interconnect
10/12/2010US7813368 Communication system
10/12/2010US7812643 Implementing CML multiplexer load balancing
10/12/2010US7812642 Pass gate with improved latchup immunity
10/12/2010US7812641 Wireline transmission circuit
10/12/2010US7812640 Bridge design for SD and MMC data buses
10/12/2010US7812639 Extending drive capability in integrated circuits utilizing programmable-voltage output circuits
10/12/2010US7812638 Input output device for mixed-voltage tolerant
10/12/2010US7812637 Level shifter
10/12/2010US7812636 Method and device for generating pseudo-random binary data
10/12/2010US7812635 Programmable logic device architecture with the ability to combine adjacent logic elements for the purpose of performing high order logic functions
10/12/2010US7812634 Programmable logic device transceiver architectures that facilitate using various numbers of transceiver channels together
10/12/2010US7812633 Apparatus and method for the arithmetic over-ride of look up table outputs in a programmable logic device
10/12/2010US7812631 Sleep transistor array apparatus and method with leakage control circuitry
10/12/2010US7812630 Latch circuit
10/12/2010US7812629 Resilient integrated circuit architecture
10/12/2010US7812458 Pad invariant FPGA and ASIC devices
10/07/2010WO2010113713A1 Semiconductor device
10/07/2010WO2010077037A3 Interface system for a cog application
10/07/2010WO2010052187A3 Driver circuit for producing a load voltage
10/07/2010US20100253389 Low-noise PECL output driver
10/07/2010US20100253388 Interface circuit
10/07/2010US20100253386 Data transmitter and related semiconductor device
10/07/2010US20100253385 Edge detect receiver circuit
10/07/2010US20100253384 Semiconductor device
10/07/2010US20100253383 Circuit topology for multiple loads
10/07/2010DE19950767B4 Stromsteuerschaltkreis und diesen enthaltendes Halbleiterspeicherbauelement Current control circuit, and this semiconductor memory device containing
10/06/2010EP2237419A1 Transceiver for single ended communication with low EMI
10/06/2010EP2235830A1 Hardened current mode logic (cml) voter circuit, system and method
10/06/2010EP2235827A2 Extending drive capability in integrated circuits utilizing programmable-voltage output circuits
10/06/2010CN201601664U 一种具有抗干扰功能的光电耦合电路 Optical coupling circuit having an anti-jamming function
10/06/2010CN1988387B Judging circuit and method for high order single circulation over sampling noise shaping stability
10/06/2010CN1917370B Receiver and method for operating receiver
10/06/2010CN1889363B Electric level shifting circuit
10/06/2010CN1523670B Semiconductor device and driving method of the same
10/06/2010CN101854168A Photoelectric coupler isolated communication circuit
10/06/2010CN101854167A Ocd driver system with controllable slew rate and related method
10/06/2010CN101854166A Differential signal output device
10/06/2010CN101854165A Signal converter
10/06/2010CN101164235B Integrated circuit, electronic device and integrated circuit control method
10/06/2010CN101136629B Driving circuit and driving method for charge pump
10/05/2010US7809864 Method and apparatus for a hot-swappable input/output device with programmable over-voltage clamp protection
10/05/2010US7809521 Precise delay measurement through combinatorial logic
10/05/2010US7808468 Source driver for controlling a slew rate and a method for controlling the slew rate
10/05/2010US7808416 Output circuit, digital analog circuit and display device
10/05/2010US7808405 Efficient bitstream compression
10/05/2010US7808281 Differential common mode logic driver with switching control circuit
10/05/2010US7808279 Low power, self-gated, pulse triggered clock gating cell
10/05/2010US7808278 Driver calibration methods and circuits
10/05/2010US7808277 Bidirectional signal separation module for a bus converter
10/05/2010US7808276 Chip-to-chip communication system and method
10/05/2010US7808275 Input buffer with adaptive trip point
10/05/2010US7808274 Monolithically integrated multiplexer-translator-demultiplexer circuit and method
10/05/2010US7808272 Integrated circuit
10/05/2010US7808271 Time-balanced multiplexer switching methods and apparatus
10/05/2010US7808270 Output circuit for semiconductor device, semiconductor device having output circuit, and method of adjusting characteristics of output circuit
10/05/2010US7808269 Semiconductor integrated circuit
09/2010
09/30/2010WO2010110840A2 Low speed. load independent, slew rate controlled output buffer with no dc power consumption
09/30/2010WO2010110244A1 Three-dimensional semiconductor integrated circuit
09/30/2010WO2010109963A1 Nonvolatile programmable logic switch
09/30/2010WO2010109668A1 Phase adjustment method, data transfer device, and data transfer system
09/30/2010US20100246242 Soft Error Robust Storage SRAM Cells and Flip-Flops
09/30/2010US20100244901 Clock switching circuit, integrated circuit device and electronic apparatus
09/30/2010US20100244900 Power Up Biasing in a System Having Multiple Input Biasing Modes
09/30/2010US20100244899 Tuning High-Side and Low-Side CMOS Data-Paths in CML-to-CMOS Signal Converter
09/30/2010US20100244898 Transceiver for single ended communication with low emi
09/30/2010US20100244897 Spin mosfet and reconfigurable logic circuit
09/30/2010US20100244896 Programmable logic device with embedded switch fabric
09/30/2010US20100244895 Scalable non-blocking switching network for programmable logic
09/30/2010US20100244894 Enhanced field programmable gate array
09/30/2010US20100244893 Variable sized soft memory macros in structured cell arrays, and related methods
09/30/2010US20100244892 Rom implementation for rom based logic design
09/30/2010US20100244891 Integrated circuits and methods for providing impedance of driver to drive data
09/30/2010US20100244890 Preventing Erroneous Operation in a System Where Synchronized Operation is Required
09/30/2010US20100244889 Resilient Integrated Circuit Architecture
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