Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
01/2011
01/04/2011US7863927 Semiconductor device
01/04/2011US7863926 Device forming a logic gate for minimizing the differences in electrical or electro-magnetic behavior in an integrated circuit manipulating a secret
12/2010
12/30/2010US20100328984 Piezo-effect transistor device and applications
12/30/2010US20100327911 Semiconductor Device and a Display Device
12/30/2010US20100327910 Interface device and interface system
12/30/2010US20100327909 Keeper circuit
12/30/2010US20100327908 Method and apparatus for die testing on wafer
12/30/2010US20100327907 Enhanced permutable switching network with multicasting signals for interconnection fabric
12/30/2010US20100327906 Inverting flip-flop for use in field programmable gate arrays
12/30/2010US20100327905 Method and Apparatus for Providing a Non-Volatile Programmable Transistor
12/30/2010US20100327903 Circuit for calibrating impedance and semiconductor apparatus using the same
12/29/2010WO2010150654A1 Asynchronous logic circuit, congestion avoiding path calculation module, semiconductor circuit, and path calculation method in asynchronous logic circuit
12/29/2010WO2010150637A1 Reconfigurable semiconductor device
12/29/2010WO2010149629A1 Low-current input buffer
12/29/2010EP2267897A1 Input/output buffer
12/29/2010CN201690435U Logic module
12/29/2010CN1969457B Low leakage and data retention circuitry
12/29/2010CN101933231A Extending drive capability in integrated circuits utilizing programmable-voltage output circuits
12/29/2010CN101931526A Method for implementing automatically switched chaotic system and analogue circuit
12/29/2010CN101931395A Integrated circuit analysis systems and methods
12/29/2010CN101931394A Logic control method of natural language program and computing method thereof
12/29/2010CN101931393A I2C output level circuit integrated with gradient control
12/29/2010CN101931368A Low-noise amplifier
12/29/2010CN101930787A Internal memory interface circuit framework supporting multi-internal memory standard and implementation thereof on metal oxide semiconductor (MOS) process
12/29/2010CN101557456B Correlated duplex-sampling circuit and complementary metal oxide semiconductor (CMOS) image sensing unit
12/29/2010CN101488755B CMOS series comparator, single terminal CMOS phase reverser and control method therefor
12/28/2010US7859739 Interferometric modulator array with integrated MEMS electrical switches
12/28/2010US7859673 Method and arrangement for detecting light signals
12/28/2010US7859349 Fully integrated tuneable spin torque device for generating an oscillating signal and method for tuning such apparatus
12/28/2010US7859312 Multivalued logic circuit
12/28/2010US7859311 Integrated nanotube and field effect switching devices
12/28/2010US7859310 Semiconductor integrated circuit
12/28/2010US7859308 Reconfigurable logic cell made up of double-gate MOSFET transistors
12/28/2010US7859307 High speed transient active pull-up I2C
12/28/2010US7859306 Load driving circuit
12/28/2010US7859305 Input/output circuit
12/28/2010US7859304 Multiple data rate interface architecture
12/28/2010US7859303 Nonvolatile programmable logic circuit
12/28/2010US7859302 Programmable system on a chip for power-supply voltage and current monitoring and control
12/28/2010US7859301 Power regulator circuitry for programmable logic device memory elements
12/28/2010US7859300 Input and output circuit apparatus
12/28/2010US7859298 Method and system to facilitate configurable input/output (I/O) termination voltage reference
12/28/2010US7859297 Impedance conversion in data communication
12/28/2010US7859296 Calibration circuit, on die termination device and semiconductor memory device using the same
12/28/2010US7859295 Transmitter apparatus, systems, and methods
12/28/2010US7859293 Semiconductor integrated circuit
12/28/2010US7859292 Methods and circuitry for reconfigurable SEU/SET tolerance
12/23/2010WO2010148247A1 Leakage reduction in electronic circuits
12/23/2010WO2010146843A1 Flip-flop, semiconductor integrated circuit, semiconductor device, and blade server
12/23/2010WO2010146051A1 Low-current logic-gate circuit
12/23/2010WO2010146049A1 Low-current inverter circuit
12/23/2010US20100322016 Retention of data during stand-by mode
12/23/2010US20100321088 Electric Circuit
12/23/2010US20100321066 Digital noise filter
12/23/2010US20100321065 Semiconductor integrated circuit having insulated gate field effect transistors
12/23/2010US20100321064 Combinatorial circuit with shorter delay when inputs arrive sequentially and delta sigma modulator using the combinatorial circuit
12/23/2010US20100321063 Integrated circuit and standard cell for an integrated circuit
12/23/2010US20100321062 Configurable circuit and configuration method
12/23/2010US20100321061 Threshold logic element having low leakage power and high performance
12/23/2010US20100321060 Semiconductor lsi and semiconductor device
12/23/2010US20100321059 Impedance adjustment circuit
12/23/2010US20100321058 Fault Tolerant Integrated Circuit Architecture
12/23/2010DE102005052750B4 Verfahren und Systeme zum Schalten zwischen mehreren Zuständen unter Verwendung zumindest einer ternären Eingabe und zumindest einer diskreten Eingabe Methods and systems for switching between multiple states using at least a ternary input and at least one discrete input
12/22/2010EP2264901A2 Integrated circuit and standard cell of same
12/22/2010EP2264900A1 Low-current inverter circuit
12/22/2010EP2264899A1 Low-current logic-gate circuit
12/22/2010EP2264893A1 Logic circuit
12/22/2010EP2264600A2 Enhanced embedded logic analyzer
12/22/2010EP2264599A2 Enhanced embedded logic analyzer
12/22/2010EP2264598A2 Enhanced embedded logic analyzer
12/22/2010EP2263316A1 Electronic component configuration
12/22/2010EP2171851B1 Reconfigurable logic cell made up of double-gate mosfet transistors
12/22/2010CN201682037U Single-pole double-throw switch
12/22/2010CN1674443B Level-conversion circuit
12/22/2010CN101924551A FPAA mistuning digital automatic calibration method
12/22/2010CN101924550A Lookup table using gain unit eDRAMs
12/22/2010CN101924549A High speed integrated circuit
12/22/2010CN101924548A Real-time clock driving circuit
12/22/2010CN101924547A Current sampling device
12/22/2010CN101924546A Rapid dynamic register and related integrated circuit and data temporary storage method
12/22/2010CN101924545A Error detection in precharged logic
12/22/2010CN101924540A Differential time domain comparator circuit
12/22/2010CN101924539A Signal transmission circuit from low side to high side
12/22/2010CN101924538A Synchronizing signal control device and control method thereof
12/22/2010CN101924536A Low frequency oscillator applied to burst mode dimming control of CCFL driving system
12/22/2010CN101540148B Driving device for liquid crystal display and related output enable signal transfer device
12/22/2010CN101396172B Method of accurate control for removing filter-stick of high-speed filter-stick forming device
12/22/2010CN101304250B Semiconductor integrated circuit and operation method thereof
12/22/2010CN101256755B Driver circuit
12/21/2010US7856611 Reconfigurable interconnect for use in software-defined radio systems
12/21/2010US7855593 Semiconductor integrated circuit device
12/21/2010US7855578 Domino logic circuit techniques for suppressing subthreshold and gate oxide leakage
12/21/2010US7855577 Using a single buffer for multiple I/O standards
12/21/2010US7855576 Versatile common-mode driver methods and apparatus
12/21/2010US7855575 Wide voltage range level shifter with symmetrical switching
12/21/2010US7855574 Programmable multiple supply regions with switched pass gate level converters
12/21/2010US7855573 Controller area network active bus terminator
12/16/2010WO2010144215A2 Voltage translator
12/16/2010WO2010142840A1 Apparatus and associated methods in relation to carbon nanotube networks
12/16/2010US20100315128 Circuit configurations having four terminal devices
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