Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
12/1999
12/23/1999WO1999066345A1 Scintillator panel and radiation image sensor
12/23/1999WO1999066337A2 Device for measuring and analyzing electrical signals of an integrated circuit component
12/23/1999WO1999050889A3 Printed insulators for active and passive electronic devices
12/23/1999WO1999048339A8 Substrate for patterning thin film and surface treatment thereof
12/23/1999WO1999045595A3 Photodetector and use of the same
12/23/1999WO1999045588A3 Semiconductor device comprising a glass supporting body onto which a substrate with semiconductor elements and a metallization is attached by means of an adhesive
12/23/1999DE19927727A1 Voltage surge suppression circuit for transistors with isolated gates
12/23/1999DE19926711A1 Ferroelectric DRAM device and manufacture
12/23/1999DE19926321A1 CCD image sensor with light quantity monitoring for pixels
12/23/1999DE19906192A1 Semiconducting arrangement having high density capacitance
12/23/1999DE19860119A1 Semiconducting device for memory cell
12/23/1999DE19858364A1 Semiconducting device with memory circuit and logic circuit mixed on single chip
12/23/1999DE19857095A1 Semiconductor component with dual-gate oxide layers of different thicknesses especially in a chip having an integrated DRAM and a mounted logic device
12/23/1999DE19848444A1 Method of forming a selective metal layer to fill contact hole in manufacture of semiconductor capacitor
12/23/1999DE19813239C1 Verdrahtungsverfahren zur Herstellung einer vertikalen integrierten Schaltungsstruktur und vertikale integrierte Schaltungsstruktur A wiring method for producing a vertical integrated circuit structure and vertical integrated circuit structure
12/23/1999CA2335317A1 Production of structured electrodes
12/22/1999EP0966182A1 Method of fabricating organic electroluminescent display panel
12/22/1999EP0966044A2 Semiconductor memory and manufacturing method therefor
12/22/1999EP0966043A1 A trench capacitor with isolation collar and corresponding manufacturing method
12/22/1999EP0966042A1 Monolithically integrated device with protective structure
12/22/1999EP0966041A2 Logic gate cell
12/22/1999EP0966040A1 Passive component above isolation trenches
12/22/1999EP0966036A2 Method for fabricating a semiconductor device having different gate oxide layers
12/22/1999EP0966034A1 Method of manufacturing silicon-on-insulator substrate
12/22/1999EP0966018A1 Light-emissive devices
12/22/1999EP0965144A2 Manufacture of a semiconductor device with a poly-emitter bipolar transistor
12/22/1999EP0965141A1 Method of providing a gettering scheme in the manufacture of silicon-on-insulator (soi) integrated circuits
12/22/1999EP0965133A1 Nonvolatile pmos two transistor memory cell and array
12/22/1999EP0964800A1 Pixel-matrix display arrangement for transport systems
12/22/1999EP0857354A4 A process for fabricating semiconductor devices with shallowly doped regions using dopant compounds containing elements of high solid solubility
12/22/1999CN1239543A Spherical shaped semiconductor integrated circuit
12/22/1999CN1239395A Method of fabricating organic electroluminescent display panel
12/22/1999CN1239355A 半导体集成电路装置 The semiconductor integrated circuit device
12/22/1999CN1239328A Semiconductor device and method of forming the same
12/22/1999CN1239325A Method of forming semiconductor device
12/22/1999CN1239324A Semiconductor devices
12/22/1999CN1239320A Method of forming selective metal layer and method of forming capacitor and filling contact hole using the same
12/22/1999CN1239317A Semiconductors having defect denuded zones
12/22/1999CN1239308A Pixel sensor column amplifier architecture
12/21/1999US6006350 Semiconductor device testing apparatus and method for testing memory and logic sections of a semiconductor device
12/21/1999US6005807 Method and apparatus for self-aligned memory cells and array using source side injection
12/21/1999US6005801 Reduced leakage DRAM storage unit
12/21/1999US6005800 Magnetic memory array with paired asymmetric memory cells for improved write margin
12/21/1999US6005798 Magnetoresistance effect device, and magnetoresistance effect type head, memory device, and amplifying device using the same
12/21/1999US6005797 Latch-up prevention for memory cells
12/21/1999US6005796 Single ended simpler dual port memory cell
12/21/1999US6005795 Single ended dual port memory cell
12/21/1999US6005792 Circuit arrangement for a memory cell of a D/A converter
12/21/1999US6005692 Light-emitting diode constructions
12/21/1999US6005619 Quantum efficiency improvements in active pixel sensors
12/21/1999US6005412 AGP/DDR interfaces for full swing and reduced swing (SSTL) signals on an integrated circuit chip
12/21/1999US6005408 System for compensating for temperature induced delay variation in an integrated circuit
12/21/1999US6005344 Organic electroluminescent image display panel with multiple barriers
12/21/1999US6005296 Layout for SRAM structure
12/21/1999US6005284 Semiconductor device and its manufacturing method
12/21/1999US6005283 Complementary bipolar transistors
12/21/1999US6005282 Integrated circuit with complementary isolated bipolar transistors
12/21/1999US6005278 Divided photodiode
12/21/1999US6005273 Transistors having controlled conductive spacers, uses of such transistors and methods of making such transistors
12/21/1999US6005270 Semiconductor nonvolatile memory device and method of production of same
12/21/1999US6005269 DRAM cell with a double-crown shaped capacitor
12/21/1999US6005266 Very low leakage JFET for monolithically integrated arrays
12/21/1999US6005265 Semiconductor integrated circuit device having wiring layout for small amplitude signals
12/21/1999US6005264 Microelectronic integrated circuit including hexagonal CMOS "NAND" gate device
12/21/1999US6005238 Hybrid sensor pixel architecture with linearization circuit
12/21/1999US6004882 Method for etching Pt film of semiconductor device
12/21/1999US6004866 Method for manufacturing bonded wafer and bonded wafer manufactured thereby
12/21/1999US6004865 Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator
12/21/1999US6004860 SOI substrate and a method for fabricating the same
12/21/1999US6004856 Manufacturing process for a raised capacitor electrode
12/21/1999US6004854 Method of forming CMOS integrated circuitry
12/21/1999US6004848 Method of forming a multi-level memory array with channel bias algorithm
12/21/1999US6004847 Process for forming an integrated circuit comprising non-volatile memory cells and side transistors and corresponding IC
12/21/1999US6004846 Method for manufacturing DRAM capacitor using hemispherical grained silicon
12/21/1999US6004845 Method for fabricating a crown-shaped capacitor
12/21/1999US6004844 Unit cell layout and transfer gate design for high density DRAMs
12/21/1999US6004842 Method of making a DRAM with a transfer transistor
12/21/1999US6004841 Fabrication process for MOSFET devices and a reproducible capacitor structure
12/21/1999US6004838 ESD protection using selective siliciding techniques
12/21/1999US6004835 Method of forming integrated circuitry, conductive lines, a conductive grid, a conductive network, an electrical interconnection to anode location and an electrical interconnection with a transistor source/drain region
12/21/1999US6004834 Method of manufacturing semiconductor device having a fuse
12/21/1999US6004831 Method for fabricating a thin film semiconductor device
12/21/1999US6004825 Method for making three dimensional ferroelectric memory
12/21/1999US6004396 Spherical shaped semiconductor integrated circuit
12/21/1999CA2134256C Apparatus and method for referencing an optical receiver
12/16/1999WO1999065085A1 Fast luminescent silicon
12/16/1999WO1999065084A1 Electronic component, method for producing the same and electronic circuit for image processing
12/16/1999WO1999065083A1 Semiconductor integrated circuit device and method of its manufacture
12/16/1999WO1999065079A1 A method of programmability and an architecture for cold sparing of cmos arrays
12/16/1999WO1999065078A2 Semiconductor device
12/16/1999WO1999065065A1 Etching process for producing substantially undercut free silicon on insulator structures
12/16/1999WO1999065063A2 Dram storage capacitor
12/16/1999WO1999064911A1 Imaging arrangement and method
12/16/1999WO1999064645A1 A method and apparatus for the formation of dielectric layers
12/16/1999WO1999064267A1 Imaging system for vehicle headlamp control
12/16/1999WO1997034320A9 Method and apparatus for fabricating silicon dioxide and silicon glass layers in integrated circuits
12/16/1999DE19924651A1 Contact fabrication for semiconductor memory device
12/16/1999DE19919939A1 IC conductor lines, e.g. DRAM contacts, are formed by a salicide process
12/16/1999DE19855602A1 Buffer circuit for digital data using dynamic threshold voltage MOS transistor
12/16/1999DE19852870A1 Active pixel structure with electronic shutter function