Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
06/2002
06/19/2002CN1354889A Method for expanding trenches by anisotropic wet etch
06/19/2002CN1354887A Method for producing semiconductor memory component
06/19/2002CN1354596A Camera device and its manufacturing method, and electric equipment thereof
06/19/2002CN1354568A Instrument for communication system and semiconductor integrated circuit device
06/19/2002CN1354524A Package structure for integrated circuit
06/19/2002CN1354523A Semiconductor storage device and its making method
06/19/2002CN1354522A 半导体器件及其制造方法 Semiconductor device and manufacturing method thereof
06/19/2002CN1354521A Semiconductor device and manufacturing mehtod thereof
06/19/2002CN1354520A 半导体集成电路 The semiconductor integrated circuit
06/19/2002CN1354519A Method for raising breakdown voltage in magnetic tunnel junction
06/19/2002CN1354517A Channel limited silicon-germanium static discharge diode network
06/19/2002CN1354498A Gamma-ray radiation method for improving imaging quality of CMOS digital image sensor
06/19/2002CN1086513C Method for making insulated gate field effect transistor
06/18/2002US6408402 Efficient direct replacement cell fault tolerant architecture
06/18/2002US6408110 Tiled imaging apparatus providing substantially continuous imaging
06/18/2002US6407958 Semiconductor integrated circuit device with split hierarchical power supply structure
06/18/2002US6407952 Semiconductor memory
06/18/2002US6407941 Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
06/18/2002US6407939 Single deposition layer metal dynamic random access memory
06/18/2002US6407898 Protection means for preventing power-on sequence induced latch-up
06/18/2002US6407502 EL display with electrodes normal to the surface
06/18/2002US6407464 Semiconductor device
06/18/2002US6407463 Semiconductor memory device having gate electrode, drain-drain contact, and drain-gate contact layers
06/18/2002US6407449 Pin layout of semiconductor integrated circuits including dual band amplifier and receiving mixer
06/18/2002US6407445 MOSFET-based electrostatic discharge (ESD) protection structure with a floating heat sink
06/18/2002US6407442 Semiconductor device, and operating device, signal converter, and signal processing system using the same semiconductor device
06/18/2002US6407441 Integrated circuit and method of using porous silicon to achieve component isolation in radio frequency applications
06/18/2002US6407440 Pixel cell with high storage capacitance for a CMOS imager
06/18/2002US6407435 Because the layers reduce the effects of crystalline structures within individual layers, the overall tunneling current is reduced.
06/18/2002US6407434 Hexagonal architecture
06/18/2002US6407431 Semiconductor device and fabrication method thereof
06/18/2002US6407430 Electro-optical device and semiconductor circuit
06/18/2002US6407429 Semiconductor device having silicon on insulator and fabricating method therefor
06/18/2002US6407425 Programmable neuron MOSFET on SOI
06/18/2002US6407422 Oxygen diffusion blocking semiconductor capacitor
06/18/2002US6407420 Integrated circuit device having line width determined by side wall spacer provided in openings formed in insulating film for connection conductors
06/18/2002US6407419 Semiconductor device and manufacturing method thereof
06/18/2002US6407418 Semiconductor device, method of manufacturing the same, image sensor apparatus having the same and image reader having the same
06/18/2002US6407417 Photoelectric conversion device and method of manufacturing the same
06/18/2002US6407416 Semiconductor device
06/18/2002US6407415 Solid state image sensor and method for fabricating the same
06/18/2002US6407414 Electrostatic discharge protection device
06/18/2002US6407413 Semiconductor device with guard ring and Zener diode layer thereover
06/18/2002US6407412 MOS varactor structure with engineered voltage control range
06/18/2002US6407408 Method for patterning devices
06/18/2002US6407406 High operation speed and low power consumption; strained semiconductor layer applied with a tensile or compressive strain; low dislocation density and a sufficiently thin buffer layer
06/18/2002US6407393 X-ray image sensor and method for fabricating the same
06/18/2002US6407374 Two-dimensional array type detecting device having a common and individual electrodes
06/18/2002US6407330 Solar cells incorporating light harvesting arrays
06/18/2002US6407005 Method for forming semiconductor device to prevent electric field concentration from being generated at corner of active region
06/18/2002US6406980 Physical design technique providing single and multiple core microprocessor chips in a single design cycle and manufacturing lot using shared mask sets
06/18/2002US6406976 Semiconductor device and process for forming the same
06/18/2002US6406974 Method of forming triple N well utilizing phosphorus and boron ion implantations
06/18/2002US6406971 Fabrication method for an embedded dynamic random access memory (DRAM)
06/18/2002US6406967 Method for manufacturing cylindrical storage electrode of semiconductor device
06/18/2002US6406965 Method of fabricating HBT devices
06/18/2002US6406963 Patterned layer is applied defining area of gate structure, and dielectric layer is applied in such way that thickness of dielectric layer next to patterned layer is larger than height of patterned layer
06/18/2002US6406962 Vertical trench-formed dual-gate FET device structure and method for creation
06/18/2002US6406959 Method of forming FLASH memory, method of forming FLASH memory and SRAM circuitry, and etching methods
06/18/2002US6406958 Method of manufacturing nonvolatile semiconductor memory device
06/18/2002US6406956 Poly resistor structure for damascene metal gate
06/18/2002US6406955 Method for manufacturing CMOS devices having transistors with mutually different punch-through voltage characteristics
06/18/2002US6406953 Method for fabricating an integrated circuit with a transistor electrode
06/18/2002US6406952 Process for device fabrication
06/18/2002US6406949 Thin film transistor-liquid crystal display and manufacturing method therefor
06/18/2002US6406948 Method for forming an ESD protection network for SOI technology with the ESD device formed in an underlying silicon substrate
06/18/2002US6406946 Thin film transistor matrix device and method for fabricating the same
06/18/2002US6406941 Solid-state imaging device and manufacturing method thereof
06/18/2002US6406802 Multilayer; substrate, color filter, thermosetting resin and silica barrier
06/18/2002US6406583 Wafer level creation of multiple optical elements
06/13/2002WO2002047377A1 Photosensor and photosensing method
06/13/2002WO2002047310A2 Display tile structure using organic light emitting materials
06/13/2002WO2002047174A2 Method and structure for minimizing error sources in image and position sensing detectors
06/13/2002WO2002047170A1 Semiconductor device
06/13/2002WO2002047169A1 Multi-quantum-well infrared sensor array in spatially separated multi-band configuration
06/13/2002WO2002047168A2 Cmos inverter circuits utilizing strained silicon surface channel mosfets
06/13/2002WO2002047167A1 Semiconductor device
06/13/2002WO2002047166A2 Esd protection devices
06/13/2002WO2002047160A2 Method for producing high-speed vertical npn bipolar transistors and complementary mos transistors on a chip
06/13/2002WO2002047156A1 Method for producing a thin film comprising introduction of gaseous species
06/13/2002WO2002047127A2 Pyroelectric device on a monocrystalline semiconductor substrate
06/13/2002WO2002047113A2 Layers in substrate wafers
06/13/2002WO2002047053A1 Image display device, method of manufacturing image display device, and image display driver ic
06/13/2002WO2002046791A1 Devices for imaging radionuclide emissions
06/13/2002WO2002046727A2 Apparatus and method of converting electromagnetic energy directly to electrons for computed tomography imaging
06/13/2002WO2002046493A1 Method for producing noble metal thin film electrode for usli
06/13/2002WO2002025733A3 Non-volatile memory cell array and methods of forming
06/13/2002WO2002015278A3 Multigate semiconductor device and method of fabrication
06/13/2002WO2002007221A3 Embedded decoupling capacitor
06/13/2002WO2001095378A3 Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
06/13/2002WO2001042994A3 Modification of integrated circuits
06/13/2002US20020073392 Die architecture accommodating high-speed semiconductor devices
06/13/2002US20020073391 Semiconductor device having dummy pattern
06/13/2002US20020072461 Infrared absorbing glass, and its fabrication method
06/13/2002US20020072253 Method of removing an amorphous oxide from a monocrystalline surface
06/13/2002US20020072245 Thin film of monocrystalline oxide formed on a bulk wafer monolithically integrated with a complementary metal oxide on a monocrystalline substrate and does not require cooling
06/13/2002US20020072242 Method of forming a slope lateral structure
06/13/2002US20020072239 Method for manufacturing solid-state imaging device
06/13/2002US20020072223 Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications
06/13/2002US20020072219 Planarization of a polysilicon layer surface by chemical mechanical polish to improve lithography and silicide formation