| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 03/27/1979 | US4145803 Lithographic offset alignment techniques for RAM fabrication |
| 03/27/1979 | CA1051325A1 Liquid phase epitaxial growth |
| 03/21/1979 | EP0001164A1 Integrated read-only memory |
| 03/21/1979 | EP0001146A1 Charge coupled device |
| 03/21/1979 | EP0001100A2 Method for forming recessed dielectric isolation regions in silicon by means of charged and accelerated particles |
| 03/21/1979 | EP0001042A1 Method and device for corpuscular ray shadow projection exposure |
| 03/21/1979 | EP0001038A1 A method for making a silicon mask and its utilisation |
| 03/20/1979 | US4145703 Doped polysilicon gate electrode, v-shaped |
| 03/20/1979 | US4145701 Semiconductor device |
| 03/20/1979 | US4145700 Power field effect transistors |
| 03/20/1979 | US4145676 Input stage for a CTD low-pass filter |
| 03/20/1979 | US4145621 Transistor logic circuits |
| 03/20/1979 | US4145615 Electron beam exposure apparatus |
| 03/20/1979 | US4145597 Electron beam lithographic system |
| 03/20/1979 | US4145459 Depositing metal films on semiconductor with groove, masking |
| 03/20/1979 | US4145390 Process for mounting components on a base by means of thixotropic material |
| 03/20/1979 | US4145262 Method of manufacturing a semiconductor device and semiconductor device manufactured according to the method |
| 03/20/1979 | US4145233 Method for making narrow channel FET by masking and ion-implantation |
| 03/20/1979 | US4144634 Fabrication of gallium arsenide MOS devices |
| 03/20/1979 | CA1051124A1 Schottky barrier type semiconductor device |
| 03/20/1979 | CA1051123A1 Dielectrically isolated semiconductive device |
| 03/20/1979 | CA1050866A1 Definition control of polycrystalline silicon |
| 03/20/1979 | CA1050739A1 Process for the production of ceramic substrates for thin layer circuits |
| 03/13/1979 | US4144493 Integrated circuit test structure |
| 03/13/1979 | US4144139 Semiconductors, solar cells |
| 03/13/1979 | US4144116 Vapor deposition of single crystal gallium nitride |
| 03/13/1979 | US4144106 Manufacture of an I2 device utilizing staged selective diffusion thru a polycrystalline mask |
| 03/13/1979 | US4144101 Process for providing self-aligned doping regions by ion-implantation and lift-off |
| 03/13/1979 | US4144100 Method of low dose phoshorus implantation for oxide passivated diodes in <10> P-type silicon |
| 03/13/1979 | US4144099 High performance silicon wafer and fabrication process |
| 03/13/1979 | US4144098 P+ Buried layer for I2 L isolation by ion implantation |
| 03/13/1979 | US4143456 Semiconductor device insulation method |
| 03/13/1979 | US4143455 Silicon nitride as first insulating layer |
| 03/13/1979 | CA1050668A1 Copper-to-gold thermal compression gang bonding of interconnect leads to semiconductive devices |
| 03/13/1979 | CA1050667A1 Method of manufacturing semiconductor devices |
| 03/13/1979 | CA1050327A1 Maleic anhydride modified rosin as binder for photoresist composition |
| 03/07/1979 | EP0001030A1 Process for manufacturing a mask according to a given pattern on a support |
| 03/07/1979 | EP0000975A1 A composite JFET-bipolar structure |
| 03/07/1979 | EP0000909A1 Lateral transistor |
| 03/07/1979 | EP0000897A1 Method for producing laterally isolated silicium areas |
| 03/07/1979 | EP0000863A1 Temperature compensated integrated semiconductor resistor |
| 03/06/1979 | US4143421 Tetrode transistor memory logic cell |
| 03/06/1979 | US4143393 High field capacitor structure employing a carrier trapping region |
| 03/06/1979 | US4143392 Composite jfet-bipolar structure |
| 03/06/1979 | US4143388 Mos type semiconductor device |
| 03/06/1979 | US4143384 Low parasitic capacitance diode |
| 03/06/1979 | US4143383 Controllable impedance attenuator having all connection contacts on one side |
| 03/06/1979 | US4143178 Polycrystalline, dopes |
| 03/06/1979 | US4142953 Semiconductor etching |
| 03/06/1979 | US4142926 Masking, selective etching |
| 03/06/1979 | US4142925 Method of making silicon-insulator-polysilicon infrared image device utilizing epitaxial deposition and selective etching |
| 03/06/1979 | US4142924 Fast-sweep growth method for growing layers using liquid phase epitaxy |
| 03/06/1979 | US4142893 Spray etch dicing method |
| 03/06/1979 | US4142892 Method of reducing the defect density in a positive-working photoresist layer using a salt of imidazolinium |
| 03/06/1979 | US4142714 Wire clamp |
| 03/06/1979 | US4142662 Method of bonding microelectronic chips |
| 03/06/1979 | US4142288 Method for contacting contact areas located on semiconductor bodies |
| 03/06/1979 | CA1050143A1 Annealing solar cells of inp/cds |
| 02/27/1979 | US4142203 Method of assembling a hermetically sealed semiconductor unit |
| 02/27/1979 | US4142202 Gold, nickel, silver, dopes |
| 02/27/1979 | US4142199 Bucket brigade device and process |
| 02/27/1979 | US4142195 Glow discharge in silane, annealing |
| 02/27/1979 | US4142194 Web processor |
| 02/27/1979 | US4142160 Hetero-structure injection laser |
| 02/27/1979 | US4142118 Integrated circuit with power supply voltage level detection |
| 02/27/1979 | US4142115 Semiconductor device with a thermal protective device |
| 02/27/1979 | US4142111 One-transistor fully static semiconductor memory cell |
| 02/27/1979 | US4142107 Resist development control system |
| 02/27/1979 | US4142004 Reacting silane and ammonia |
| 02/27/1979 | US4141811 Plasma etching process for the manufacture of solar cells |
| 02/27/1979 | US4141782 Bump circuits on tape utilizing chemical milling |
| 02/27/1979 | US4141778 Vapor deposition, decomposition |
| 02/27/1979 | US4141777 Method of preparing doped single crystals of cadmium telluride |
| 02/27/1979 | US4141765 Masking with silicon nitride or oxide, filling with silicon chloride, hydrogen chloride, or silane |
| 02/27/1979 | US4141757 Uniform thermomigration utilizing sample movement |
| 02/27/1979 | US4141738 Melt-formed polycrystalline ceramics and dopant hosts containing phosphorus |
| 02/27/1979 | US4141712 Manufacturing process for package for electronic devices |
| 02/27/1979 | US4141458 Wafer transport system |
| 02/27/1979 | US4141136 Method of fabricating semiconductor devices with a low thermal resistance and devices obtained by the method |
| 02/27/1979 | CA1049662A1 Apparatus and method for transferring semiconductor wafers |
| 02/21/1979 | EP0000843A1 Plasma discharge ion source |
| 02/21/1979 | EP0000830A1 Photovoltaic elements |
| 02/21/1979 | EP0000829A1 Photovoltaic elements |
| 02/21/1979 | EP0000743A1 Method for fabricating tantalum contacts on a N-type conducting silicon semiconductor substrate |
| 02/21/1979 | EP0000702A1 Process for forming a flow-resistant resist mask of radioation-sensitive material |
| 02/21/1979 | EP0000701A2 Process for the removal of silicon dioxide residue from a semiconductor surface |
| 02/20/1979 | USRE29918 Contactless LSI junction leakage testing method |
| 02/20/1979 | US4141030 High-power semiconductor assembly in disk-cell configuration |
| 02/20/1979 | US4141029 Stainless steel, copper, nickel, silver |
| 02/20/1979 | US4141027 IGFET integrated circuit memory cell |
| 02/20/1979 | US4141022 Refractory metal contacts for IGFETS |
| 02/20/1979 | US4141021 Field effect transistor having source and gate electrodes on opposite faces of active layer |
| 02/20/1979 | US4141020 Thermal stability |
| 02/20/1979 | US4140967 Merged array PLA device, circuit, fabrication method and testing technique |
| 02/20/1979 | US4140922 Amplifier stage for the current supply of I2 L circuits |
| 02/20/1979 | US4140913 Charged-particle beam optical apparatus for the reduction imaging of a mask on a specimen |
| 02/20/1979 | US4140817 Thick film resistor circuits |
| 02/20/1979 | US4140814 Plasma deposition of transparent conductive layers |
| 02/20/1979 | US4140610 Method of producing a PN junction type solar battery |
| 02/20/1979 | US4140572 Process for selective etching of polymeric materials embodying silicones therein |