| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 02/25/1997 | US5606584 Timing circuit |
| 02/25/1997 | US5606526 Glitch-free dual clok read circuit |
| 02/25/1997 | US5606265 Semiconductor integrated circuits with power reduction mechanism |
| 02/20/1997 | DE4345246C2 Integrated circuit output driver for suppressing noise generation, e.g. in DRAM |
| 02/19/1997 | EP0758770A1 Method and circuit for memory control resynchronization |
| 02/19/1997 | CN1143424A Memory core organization |
| 02/19/1997 | CN1143281A Pulse train length detecting circuit |
| 02/19/1997 | CN1143251A Semiconductor memory of layer position line structure with improved position line pre-charging system |
| 02/18/1997 | US5604917 IC memory card having masking function for preventing writing of data into a fixed memory area |
| 02/18/1997 | US5604884 Burst SRAMS for use with a high speed clock |
| 02/18/1997 | US5604883 Computer memory open page bias method and system |
| 02/18/1997 | US5604714 DRAM having multiple column address strobe operation |
| 02/18/1997 | US5604710 Arrangement of power supply and data input/output pads in semiconductor memory device |
| 02/18/1997 | US5604704 Compound semiconductor static random access memory device equipped with precharging circuit controlled by boosted signal |
| 02/18/1997 | US5604703 Semiconductor memory device with error check-correction function permitting reduced read-out time |
| 02/18/1997 | US5604701 Initializing a read pipeline of a non-volatile sequential memory device |
| 02/18/1997 | US5604697 Semiconductor |
| 02/18/1997 | US5604451 Sense amplifier circuit |
| 02/13/1997 | WO1997005700A1 High-precision voltage dependent timing delay circuit |
| 02/13/1997 | WO1997005619A1 Initializing a read pipeline of a non-volatile sequential memory device |
| 02/13/1997 | WO1997005618A1 Module security device |
| 02/12/1997 | EP0758127A2 Sense amplifier circuit of a nonvolatile semiconductor memory device |
| 02/12/1997 | CN1142672A Dynamical memory |
| 02/12/1997 | CN1142641A IC card memory having specific recording format and method for recording/reproducing digital voice therefrom |
| 02/12/1997 | CN1142635A High memory capacity DIMM with data and state memory |
| 02/11/1997 | US5603009 Semiconductor memory device including a data transfer circuit for transferring data between a DRAM and an SRAM |
| 02/11/1997 | US5603000 Integrated circuit memory with verification unit which resets an address translation register upon failure to define one-to-one correspondences between addresses and memory cells |
| 02/11/1997 | US5602798 Synchronous semiconductor memory device operable in a snooze mode |
| 02/11/1997 | US5602795 Method and apparatus for implementing a high-speed dynamic line driver |
| 02/11/1997 | US5602793 Semiconductor memory device having power line arranged in a meshed shape |
| 02/11/1997 | US5602787 Data memory with sense amplifier and method of operation |
| 02/11/1997 | US5602783 Memory device output buffer |
| 02/11/1997 | US5602782 Pipeline-operating type memory system capable of reading data from a memory array having data width larger than the output data width |
| 02/11/1997 | US5602781 Memory device having a plurality of sets of data buffers |
| 02/11/1997 | US5602780 Serial to parallel and parallel to serial architecture for a RAM based FIFO memory |
| 02/11/1997 | US5602773 Memory device column address selection lead layout |
| 02/11/1997 | US5602770 Associative memory device |
| 02/11/1997 | US5602738 Control apparatus for automobile engine including microcomputer which may be programmed after mounting on a circuit board |
| 02/11/1997 | US5602493 Bias circuit for an input terminal |
| 02/06/1997 | WO1997004457A2 Pipelined address memories, and systems and methods using the same |
| 02/06/1997 | WO1997004456A1 Sense amplifier with offset autonulling |
| 02/06/1997 | WO1997004448A1 Method for parallel writing and reading of data in an optical memory, a writing/reading device for use by the method and uses of the method and the writing/reading device |
| 02/06/1997 | WO1997004395A1 Method and apparatus for encryption key creation |
| 02/06/1997 | WO1997004378A1 Microcircuit with memory that is protected by both hardware and software |
| 02/06/1997 | WO1997004377A1 Single chip microprocessor, math co-processor, random number generator, real-time clock and ram having a one-wire interface |
| 02/06/1997 | WO1997004376A1 Secure module with microprocessor and co-processor |
| 02/06/1997 | CA2223638A1 Method for parallel addressing of an optical memory, a write/read device for implementing by the method, and uses thereof |
| 02/05/1997 | EP0757323A2 Method of write to graphic memory where memory cells designated by plurality of addresses selected simultaneously for one row address are written |
| 02/05/1997 | EP0530376B1 Semiconductor memory having nonvolatile semiconductor memory cell |
| 02/04/1997 | US5600819 Memory with sequential data transfer scheme |
| 02/04/1997 | US5600815 High density buffer memory architecture |
| 02/04/1997 | US5600607 Semiconductor memory device that can read out data at high speed |
| 02/04/1997 | US5600605 Auto-activate on synchronous dynamic random access memory |
| 02/04/1997 | US5600604 System for allowing a simm module with asymmetric addressing to be utilized in a computer system |
| 02/04/1997 | US5600603 Common centroid differential sensing scheme |
| 02/04/1997 | US5600602 Hierarchical memory array structure having electrically isolated bit lines for temporary data storage |
| 02/04/1997 | US5600601 Semiconductor memory device with reduced consumption power for bit line precharge |
| 02/04/1997 | US5600599 Data signal output circuit and semiconductor memory device including the same |
| 02/04/1997 | US5600597 Register protection structure for FPGA |
| 02/04/1997 | US5600269 Low power consumption comparator circuit |
| 01/30/1997 | WO1997003498A1 Output circuit and electronic device using the circuit |
| 01/30/1997 | WO1997003445A1 Block write for memory components |
| 01/30/1997 | WO1997003444A1 System comprising field programmable gate array and intelligent memory |
| 01/30/1997 | CA2226434A1 Block write or memory components |
| 01/29/1997 | EP0756379A1 Unbalanced latch and fuse circuit including the same |
| 01/29/1997 | EP0756287A2 A memory sensing circuit employing multi-current mirrors |
| 01/29/1997 | EP0755539A1 An improved cost/performance system memory unit using extended data out dynamic random access memory |
| 01/29/1997 | CN1141508A Semiconductor memory device having hierarchical bit line structure |
| 01/29/1997 | CN1141449A Method and apparatus for pipelining data in integrated circuit |
| 01/28/1997 | US5598554 For a multiprocessor system |
| 01/28/1997 | US5598376 Distributed write data drivers for burst access memories |
| 01/28/1997 | US5598374 Pipeland address memories, and systems and methods using the same |
| 01/28/1997 | US5598372 Semiconductor memory |
| 01/28/1997 | US5598371 Data input/output sensing circuit of semiconductor memory device |
| 01/23/1997 | WO1997002571A1 Distributed write data drivers for burst memories |
| 01/22/1997 | EP0755056A2 Data protocol for a music chip |
| 01/22/1997 | CN1140884A Automatic mode selection circuit for semiconductor memory device |
| 01/22/1997 | CN1140859A Data recording apparatus and method for semiconductor memory card |
| 01/21/1997 | USRE35430 Semiconductor memory device |
| 01/21/1997 | US5596616 Burst address sequence generator for addressing static random-access-memory devices |
| 01/21/1997 | US5596544 Very large scale integrated planar read only memory |
| 01/21/1997 | US5596541 Synchronous dynamic random access memory |
| 01/21/1997 | US5596540 Serial to parallel and parallel to serial architecture for a RAM based FIFO memory |
| 01/21/1997 | US5596539 Method and apparatus for a low power self-timed memory control system |
| 01/21/1997 | US5596533 Method and apparatus for reading/writing data from/into semiconductor memory device |
| 01/21/1997 | US5596521 Semiconductor memory with built-in cache |
| 01/21/1997 | US5596288 Status register with asynchronous read and reset and method for providing same |
| 01/16/1997 | WO1997001846A1 An integrated circuit having enable control circuitry |
| 01/15/1997 | EP0753858A2 Current amplifier and data bus circuit |
| 01/15/1997 | EP0753857A2 Semiconductor memory including an output buffer having a high speed hyper page mode |
| 01/15/1997 | EP0753856A2 Semiconductor memory device having circuit array structure for fast operation |
| 01/15/1997 | EP0753855A2 Data recording apparatus |
| 01/14/1997 | US5594765 Counter system for producing an output count |
| 01/14/1997 | US5594743 Fifo buffer system having an error detection and correction device |
| 01/14/1997 | US5594704 Synchronous semiconductor memory device |
| 01/14/1997 | US5594700 Sequential memory |
| 01/14/1997 | US5594698 Integrated circuit |
| 01/14/1997 | US5594697 Semiconductor device |
| 01/14/1997 | US5594696 Improvemetns in a detection circuit with a level shifting circuit |
| 01/14/1997 | US5594695 Sense amplifier control circuit of semiconductor memory device |