Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
04/1997
04/09/1997CN1147136A Data output buffer circuit of semiconductor memory device
04/09/1997CN1147135A Semiconductor memory
04/09/1997CN1147133A Apparatus for reproducing multiple sound using semiconductor memory card and method thereof
04/08/1997US5619514 Integrated circuit for processing signals
04/08/1997US5619473 Semiconductor memory device with dual address memory read amplifiers
04/08/1997US5619472 Semiconductor memory device with a plurality of bonding pads arranged in an array
04/08/1997US5619467 Sense amplifier for semiconductor memory device having feedback circuits
04/08/1997US5619465 Semiconductor memory device
04/08/1997US5619464 High performance RAM array circuit employing self-time clock generator for enabling array accessess
04/08/1997US5619461 Memory system having internal state monitoring circuit
04/08/1997US5619457 Dynamic semiconductor memory device that can control through current of input buffer circuit for external input/output control signal
04/08/1997US5619456 Synchronous output circuit
04/08/1997US5619455 Pipeline-operating type memory system capable of reading data from a memory array having data width larger than the output data width
04/08/1997US5619452 Semiconductor disk device with a constant data-writing time period
04/08/1997US5619449 Bit line sensing in a memory array
04/08/1997US5619159 Signal processing device and a method for transmitting signal
04/08/1997US5619151 Digital memory apparatus
04/08/1997US5619149 Single ended dynamic sense amplifier
04/08/1997US5619066 Serial-port memory
04/02/1997EP0766254A2 Non-volatile multi-state memory device capable with variable storing resolution
04/02/1997EP0766252A2 Rating and amplifier circuit
04/02/1997EP0766251A2 Semiconducteur memory device having extended margin in latching input signal
04/02/1997EP0765762A1 Ink jet print head identification circuit with serial out, dynamic shift registers
04/02/1997EP0765498A2 Flash memory based main memory
04/02/1997CN1146668A Data radio device with changeable clock signal frequency and capable connecting with computer
04/02/1997CN1146604A Storage device with layered position-line
04/01/1997US5617555 Burst random access memory employing sequenced banks of local tri-state drivers
04/01/1997US5617368 Semiconductor memory device equipped with serial data reading circuit and method of outputting serial data from semiconductor memory
04/01/1997US5617367 Controlling synchronous serial access to a multiport memory
04/01/1997US5617365 Semiconductor device having redundancy circuit
04/01/1997US5617362 Semiconductor memory device having extended data out function
04/01/1997US5617355 Semiconductor memory device having positive feedback sense amplifier
04/01/1997US5617049 Pulse signal generator and redundancy selection signal generator
04/01/1997US5617047 Reset and pulse width control circuits for high-performance multi-port memories and register files
03/1997
03/27/1997WO1997011487A1 Semiconductor device and method of producing the same
03/27/1997WO1997011464A1 Pipelined burst multi-way associative cache memory device
03/26/1997EP0764985A2 Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
03/25/1997US5615169 Method and structure for controlling internal operations of a DRAM array
03/25/1997US5615168 Method and apparatus for synchronized pipeline data access of a memory system
03/25/1997US5615166 Semiconductor memory integrated circuit
03/25/1997US5615161 Clocked sense amplifier with positive source feedback
03/25/1997US5615158 Sense amplifier circuit for detecting degradation of digit lines and method thereof
03/25/1997US5614856 Waveshaping circuit generating two rising slopes for a sense amplifier pulldown device
03/25/1997US5614854 Sample/hold circuit having an analog-to-digital converter and a nonvolatile memory for storing hold voltage data in digital form
03/25/1997US5614849 Method of resetting a CMOS amplifier
03/20/1997WO1997010598A1 Interlaced layout configuration for differential pairs of interconnect lines
03/20/1997WO1997010538A1 Memory controller with low skew control signal
03/19/1997EP0763830A2 Arrangement of memory cells in matrix form
03/19/1997EP0763827A2 Semiconductor memory device having serial access port
03/19/1997CN1145522A Device and method of writing-in or reading-out data
03/18/1997US5613094 Method and apparatus for enabling an assembly of non-standard memory components to emulate a standard memory module
03/18/1997US5612926 Sequential access memory
03/18/1997US5612925 Semiconductor memory device
03/18/1997US5612922 Memory device
03/18/1997US5612915 Clamp circuit for read-only-memory devices
03/18/1997US5612557 Semiconductor device having an inter-layer insulating film disposed between two wiring layers
03/13/1997DE19619883A1 Energy-saving integrated semiconductor circuit
03/13/1997DE19611212A1 Semiconductor memory read=out device
03/12/1997EP0762685A2 Recording and reproducing apparatus for audio signal using semiconductor memory
03/12/1997EP0762427A1 Semiconductor memory
03/12/1997EP0762283A1 Flag detection for first-in first-out memories
03/12/1997CN1144964A Integrated logic circuit and EEPROM
03/12/1997CN1144963A Sense amplifier
03/11/1997US5610874 Fast burst-mode synchronous random access memory device
03/11/1997US5610872 Multi-bank synchronous memory system with cascade-type memory cell structure
03/11/1997US5610871 Semiconductor memory device having a hierarchical bit line structure with reduced interference noise
03/11/1997US5610870 Circuit and method for controlling the impedance of a serial access memory
03/11/1997US5610868 Semiconductor memory device
03/11/1997US5610864 Burst EDO memory device with maximized write cycle timing
03/11/1997US5610862 Pre-charged slave latch with parallel previous state memory
03/11/1997US5610859 Semiconductor memory device
03/11/1997US5610544 Semiconductor integrated circuit free from through current due to source-voltage drop
03/11/1997US5610543 Delay locked loop for detecting the phase difference of two signals having different frequencies
03/11/1997US5610540 Low power sensor amplifier for gain memory cells
03/11/1997US5610405 Electronic device for measuring light properties
03/06/1997WO1997008705A1 Method and structure for controlling internal operations of a dram array
03/06/1997WO1997008703A1 Expandable data width sam for a multiport ram
03/06/1997WO1997008702A1 Improved memory interface for dram
03/06/1997WO1997008701A1 Integrated circuit memory with back end mode disable
03/06/1997WO1997008700A1 Reduced area sense amplifier isolation layout in a dynamic ram architecture
03/06/1997WO1997004457A3 Pipelined address memories, and systems and methods using the same
03/06/1997DE19634967A1 Semiconductor memory with high velocity read-out
03/05/1997EP0760514A2 Analog to digital converter, decimation and storage system
03/05/1997EP0760155A1 A single chip controller-memory device and a memory architecture and methods suitable for implementing the same
03/05/1997CN1144385A Dynamic memory
03/04/1997US5608688 DRAM having output control circuit
03/04/1997US5608687 Output driver control for ROM and RAM devices
03/04/1997US5608686 Synchronous semiconductor memory device with low power consumption
03/04/1997US5608681 Fast memory sense system
03/04/1997US5608680 Bit line sense amplifier for restoring and sensing data on a bit line
03/04/1997US5608675 In a dynamic random access memory device
03/04/1997US5608674 Semiconductor memory device
03/04/1997US5608668 Dram wtih open digit lines and array edge reference sensing
03/04/1997US5608666 Optical memory apparatus using first and second illuminating lights for writing and reading
02/1997
02/27/1997DE19634485A1 Synchronous semiconductor DRAM apparatus using e.g. 200 MHz clock signal
02/27/1997DE19503390C2 Datenausgabepuffer-Steuerschaltung Data output buffer control circuit
02/26/1997EP0714545A4 Improved data output buffer
02/26/1997EP0497962B1 Sense enable timing circuit for a random access memory
02/26/1997CN1143813A High speed synchronous dram
02/25/1997US5606717 Memory circuitry having bus interface for receiving information in packets and access time registers