Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
04/2009
04/23/2009US20090103374 Memory modules and memory systems having the same
04/23/2009US20090103373 High performance high capacity memory systems
04/23/2009US20090103372 High performance high capacity memory systems
04/23/2009US20090103358 Reducing programming error in memory devices
04/23/2009US20090103354 Ground Level Precharge Bit Line Scheme for Read Operation in Spin Transfer Torque Magnetoresistive Random Access Memory
04/23/2009US20090103352 DRAM including a reduced storage capacitor
04/23/2009US20090103343 Semiconductor memory device comprising transistor having vertical channel structure
04/23/2009US20090102751 Memory element and display device
04/23/2009US20090102528 Semiconductor integrated circuit
04/23/2009DE102004062224B4 Halbleitervorrichtung und Halbleitervorrichtungsmodul Semiconductor device and semiconductor device module
04/22/2009EP2050097A2 Memory circuit using a reference for sensing
04/22/2009EP1048109B1 Current control technique
04/22/2009CN201226253Y Decoration vehicle-mounted MP3 with charge function
04/22/2009CN201226252Y Vehicle-mounted acoustics system
04/22/2009CN201226251Y Portable universal serial bus flash memory with timer
04/22/2009CN201226250Y Lid-turning type spring card pole U-disk
04/22/2009CN201226249Y Mobile memory equipped with luminous plate
04/22/2009CN201226248Y Mobile memory with telescopic plug
04/22/2009CN201226238Y Numeral audio player
04/22/2009CN101416251A Electronic circuit that comprises a memory matrix and method of reading for bitline noise compensation
04/22/2009CN101414479A One-transistor memory cell on insulator random access memory
04/22/2009CN101414478A Embedded DRAM structure
04/22/2009CN101411948A Electronic toys
04/22/2009CN100481266C Multi-port memory device for buffering between hosts and non-volatile memory devices
04/22/2009CN100481264C Memory and method for operating the same
04/22/2009CN100481262C Data write circuit and data write method for semiconductor storage device
04/22/2009CN100481256C Bit line sense amplifier and semiconductor memory device having the same
04/22/2009CN100481255C Semiconductor memory device with on-die termination circuit
04/22/2009CN100481253C Semiconductor memory device with proper sensing timing
04/22/2009CN100481250C Method for reading data to memory and controller circuit
04/22/2009CN100481249C Thin film magnetic memory device provided with magnetic tunnel junctions
04/22/2009CN100481030C Semiconductor memory preventing unauthorized copying
04/22/2009CN100481022C Controller for controlling non-volatile storage
04/21/2009US7523431 Semiconductor integrated circuit
04/21/2009US7523366 Storage efficient memory system with integrated BIST function
04/21/2009US7523248 System having a controller device, a buffer device and a plurality of memory devices
04/21/2009US7523232 Mark/re-read and mark/re-write operations in a multi-queue first-in first-out memory system
04/21/2009US7523230 Device and method for maximizing performance on a memory interface with a variable number of channels
04/21/2009US7522467 Semiconductor memory device
04/21/2009US7522464 Dynamic memory refresh configurations and leakage control methods
04/21/2009US7522463 Sense amplifier with stages to reduce capacitance mismatch in current mirror load
04/21/2009US7522462 Sense amplifier and semiconductor memory device with the same
04/21/2009US7522461 Memory device architecture and method for improved bitline pre-charge and wordline timing
04/21/2009US7522460 Apparatus for controlling column selecting signal of semiconductor memory apparatus and method of controlling the same
04/21/2009US7522459 Data input circuit of semiconductor memory device
04/21/2009US7522458 Memory and method of controlling access to memory
04/21/2009US7522446 Heating MRAM cells to ease state switching
04/21/2009US7522442 Semiconductor memory device having a plurality of chips and capability of outputting a busy signal
04/21/2009US7521956 Methods and apparatus for adaptively adjusting a data receiver
04/16/2009WO2009048568A1 Mram with means of controlling magnetic anisotropy
04/16/2009WO2009048486A1 Processor instruction cache with dual-read modes
04/16/2009WO2009046515A1 Interlock of read column select and read databus precharge control signals
04/16/2009WO2007120159A3 Magnetic tunnel junction antifuse circuit comprising parallel connected reference magnetic tunnel junctions to provide an optimum reference resistance
04/16/2009WO2007061482A3 Memory interface to bridge memory buses
04/16/2009WO2007052259A3 A method, system and computer-readable code for testing of flash memory
04/16/2009WO2006019624A3 Method and system for controlling refresh to avoid memory cell data losses
04/16/2009US20090097347 Sense-amplifier circuit for a memory device with an open bit line architecture
04/16/2009US20090097346 Memory with independent access and precharge
04/16/2009US20090097344 Semiconductor memory testing device and method of testing semiconductor using the same
04/16/2009US20090097341 Semiconductor memory apparatus and method of driving the same
04/16/2009US20090097340 Read command triggered synchronization circuitry
04/16/2009US20090097339 Integrated Circuit Memory Devices Having Internal Command Generators Therein that Support Extended Command Sets Using Independent and Dependent Commands
04/16/2009US20090097338 Memory Device Receiver
04/16/2009US20090097337 Semiconductor stroage device
04/16/2009US20090097336 Phase change memory device with improved performance that minimizes cell degradation
04/16/2009US20090097335 Method and apparatus for redundant memory configuration in voltage island
04/16/2009US20090097334 Semiconductor device
04/16/2009US20090097333 Semiconductor memory device with internal voltage generating circuit and method for operating the same
04/16/2009US20090097332 Semiconductor memory device
04/16/2009US20090097331 Interleaved input signal path for multiplexed input
04/16/2009US20090097330 Fuse latch circuit and fuse latch method
04/16/2009US20090097329 Semiconductor storage device and high-speed address-latching method
04/16/2009US20090097328 Method of detecting a light attack against a memory device and memroy device employing a method of detecting a light attack
04/16/2009US20090097327 Systems and methods for reading data from a memory array
04/16/2009US20090097325 Programming method of a non-volatile memory device
04/16/2009US20090097324 Non-volatile memory device and a programmable voltage reference for a non-volatile memory device
04/16/2009US20090097322 Semiconductor memory device
04/16/2009US20090097307 Phase-change random access memory device, system having the same, and associated methods
04/16/2009US20090097306 Phase-change random access memory device, system having the same, and associated methods
04/16/2009US20090097304 Nonvolatile memory using resistance material
04/16/2009US20090097301 Semiconductor storage apparatus and semiconductor integrated circuit incorporating the same
04/16/2009US20090097295 Nonvolatile Semiconductor Memory Device
04/16/2009US20090096487 Sense amplifier control circuit
04/16/2009DE102008051035A1 Integrierte Schaltung umfassend Speichermodul mit einer Mehrzahl von Speicherbänken An integrated circuit comprising memory module having a plurality of memory banks
04/16/2009DE102008048629A1 Leseverstärkerschaltung für eine Speichervorrichtung mit einer offenen Bitleitungsarchitektur A sense amplifier circuit for a memory device having an open bit line architecture
04/16/2009DE102007002252B4 Temperatursensor und Temperaturbereichsdetektionsverfahren Temperature sensor and temperature detection method
04/16/2009DE102006001117B9 Apparat für Strom-Erfass-Verstärker-Kalibrierung in MRAM-Einrichtungen Apparatus for current-sense amplifier calibration in MRAM devices
04/16/2009DE102005019041B4 Halbleiterspeicher und Verfahren zur Anpassung der Phasenbeziehung zwischen einem Taktsignal und Strobe-Signal bei der Übernahme von zu übertragenden Schreibdaten Semiconductor memory and method of adjusting the phase relationship between a clock signal and strobe signal in the adoption of write data to be transmitted
04/16/2009DE102005014815B4 Datenleseverfahren und Halbleiterbauelement A data reading method, and semiconductor device
04/15/2009EP2047475A2 Circuit for reading a charge retention element for temporal measurement
04/15/2009EP1994489A4 Method of reducing electro-static discharge (esd) from conductors on insulators
04/15/2009EP1678621B1 Method and apparatus for sending data from multiple sources over a communications bus
04/15/2009EP1563507B1 Cascode amplifier circuit for producing a fast, stable and accurate bit line voltage
04/15/2009CN201222830Y General-purpose tandem cylinder manifold interface apparatus with movable cover body
04/15/2009CN201222362Y Stereo MP3 audio player with Bluetooth wireless transmission function
04/15/2009CN201222361Y Portable sound equipment
04/15/2009CN201222360Y Novel USB card reader
04/15/2009CN201222359Y Mobile memory with hanging strip USB data line
04/15/2009CN201222358Y Multifunctional optical energy MP3 player
04/15/2009CN201222259Y Computer mobile safety operation platform