| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 07/23/2009 | US20090185432 Semiconductor memory device |
| 07/23/2009 | US20090185431 Semiconductor device |
| 07/23/2009 | US20090185430 Memory sensing and latching circuit |
| 07/23/2009 | US20090185425 Integrated Circuit Having a Memory Cell Arrangement and Method for Reading a Memory Cell State Using a Plurality of Partial Readings |
| 07/23/2009 | US20090185422 Flash memory device having row decoders sharing single high voltage level shifter, system including the same, and associated methods |
| 07/23/2009 | US20090185418 Flash memory device configured to switch wordline and initialization voltages |
| 07/23/2009 | US20090185409 Enhanced static random access memory stability using asymmetric access transistors and design structure for same |
| 07/23/2009 | DE10326774B4 Auf-Chip Erfassung der Systemoperationsfrequenz in einem DRAM, um DRAM-Operationen einzustellen On-chip detection system of the operation frequency in a DRAM to set the DRAM operations |
| 07/23/2009 | DE102008007685A1 Integrierte Schaltung und Verfahren zum Betreiben einer integrierten Schaltung Integrated circuit and method for operating an integrated circuit |
| 07/22/2009 | EP1807766A4 De-coupled memory access system and method |
| 07/22/2009 | EP1573270A4 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency |
| 07/22/2009 | CN201278269Y USB storage disc with double storage systems |
| 07/22/2009 | CN101488363A Timing adjustment method and device |
| 07/22/2009 | CN100517502C Power-up circuit semiconductor memory device |
| 07/22/2009 | CN100517498C First in first out memory without read delay |
| 07/22/2009 | CN100517497C Storage device, method and system for writing and reading information |
| 07/21/2009 | US7565518 Semiconductor device and method of controlling the semiconductor device |
| 07/21/2009 | US7565515 Method and software for store multiplex operation |
| 07/21/2009 | US7564735 Memory device, and method for operating a memory device |
| 07/21/2009 | US7564731 Software refreshed memory device and method |
| 07/21/2009 | US7564730 Memory |
| 07/21/2009 | US7564729 Differential and hierarchical sensing for memory circuits |
| 07/21/2009 | US7564728 Semiconductor memory device and its driving method |
| 07/21/2009 | US7564726 Semiconductor memory device |
| 07/21/2009 | US7564724 Flash memory device |
| 07/21/2009 | US7564723 Reducing current consumption for input circuit of an electronic circuit |
| 07/21/2009 | US7564271 Sense amplifier and electronic apparatus using the same |
| 07/21/2009 | US7564087 Merged MOS-bipolar capacitor memory cell |
| 07/16/2009 | WO2009088909A2 3t high density nvdram cell |
| 07/16/2009 | WO2009088717A1 5t high density nvdram cell |
| 07/16/2009 | US20090182934 Memory device and method of multi-bit programming |
| 07/16/2009 | US20090180346 Portable data storage apparatus |
| 07/16/2009 | US20090180344 Self-refresh period measurement circuit of semiconductor device |
| 07/16/2009 | US20090180343 Semiconductor memory device |
| 07/16/2009 | US20090180342 Semiconductor memory device and driving method thereof |
| 07/16/2009 | US20090180341 Semiconductor device |
| 07/16/2009 | US20090180338 Data output circuit of semiconductor memory apparatus and method of controlling the same |
| 07/16/2009 | US20090180337 Data bus power-reduced semiconductor storage apparatus |
| 07/16/2009 | US20090180336 Self-refresh period measurement circuit of semiconductor device |
| 07/16/2009 | US20090180335 Integrated circuit with reduced pointer uncertainly |
| 07/16/2009 | US20090180331 Semiconductor memory device having bit line pre-charge unit separated from data register |
| 07/16/2009 | US20090180329 Program method of nonvolatile memory device |
| 07/16/2009 | US20090180327 Non-volatile semiconductor storage device |
| 07/16/2009 | US20090180307 Program lock circuit for a mask programmable anti-fuse memory array |
| 07/15/2009 | EP1946322A4 Determining optimal time instances to sense the output of a memory array |
| 07/15/2009 | CN201274181Y Multifunctional MP3 |
| 07/15/2009 | CN201274180Y Sharing MP3 |
| 07/15/2009 | CN201274179Y Portable memory device |
| 07/15/2009 | CN201274178Y Solid hard disc |
| 07/15/2009 | CN101483061A Semiconductor memory device and data processing system including the semiconductor memory device |
| 07/15/2009 | CN101483060A Clock synchronization circuit and operation method thereof |
| 07/15/2009 | CN100514498C Writable memory |
| 07/15/2009 | CN100514492C Device and method for pulse width control in a phase change memory device |
| 07/15/2009 | CN100514490C Storage device and method for amplifying voltage level of bit line and complementary bit line |
| 07/15/2009 | CN100514489C Memory devices having bit line precharge circuits and associated bit line precharge methods |
| 07/15/2009 | CN100514402C Semiconductor device, display device and electronic device |
| 07/14/2009 | US7562269 Semiconductor storage device |
| 07/14/2009 | US7562232 System and method for providing manageability to security information for secured items |
| 07/14/2009 | US7562198 Semiconductor device and semiconductor signal processing apparatus |
| 07/14/2009 | US7562193 Memory with single and dual mode access |
| 07/14/2009 | US7562184 DRAM controller for graphics processing operable to enable/disable burst transfer |
| 07/14/2009 | US7562183 Flash memory system and data writing method thereof |
| 07/14/2009 | US7561488 Wordline driving circuit and method for semiconductor memory |
| 07/14/2009 | US7561487 Layout technique for address signal lines in decoders including stitched blocks |
| 07/14/2009 | US7561485 Sense architecture |
| 07/14/2009 | US7561484 Reference-free sampled sensing |
| 07/14/2009 | US7561482 Defective block isolation in a non-volatile memory system |
| 07/14/2009 | US7561481 Memory controllers and pad sequence control methods thereof |
| 07/14/2009 | US7561480 Ground biased bitline register file |
| 07/14/2009 | US7561477 Data strobe synchronization circuit and method for double data rate, multi-bit writes |
| 07/14/2009 | US7561469 Programming method to reduce word line to word line breakdown for NAND flash |
| 07/14/2009 | US7560339 Nonvolatile memory cell comprising a reduced height vertical diode |
| 07/09/2009 | WO2009085865A1 Low noise sense amplifier array and method for nonvolatile memory |
| 07/09/2009 | US20090175110 Non-volatile memory element and method of operation therefor |
| 07/09/2009 | US20090175109 Current-mode sense amplifier and sense amplifying method |
| 07/09/2009 | US20090175108 Integrated Circuit, Cell Arrangement, Method for Manufacturing an Integrated Circuit and for Reading a Memory Cell Status, Memory Module |
| 07/09/2009 | US20090175107 Apparatus for and Method of Current Leakage Reduction in Static Random Access Memory Arrays |
| 07/09/2009 | US20090175106 Apparatus for implementing efuse sense amplifier testing without blowing the efuse |
| 07/09/2009 | US20090175103 Semiconductor memory asynchronous pipeline |
| 07/09/2009 | US20090175102 Method for controlling access of a memory |
| 07/09/2009 | US20090175101 Self-feedback control pipeline architecture for memory read path applications |
| 07/09/2009 | US20090175100 Method and apparatus for storage device with a logic unit and method for manufacturing same |
| 07/09/2009 | US20090175099 Single End Read Module for Register Files |
| 07/09/2009 | US20090175098 Semiconductor memory device including floating body transistor memory cell array and method of operating the same |
| 07/09/2009 | US20090175097 Method for detecting erroneous word lines of a memory array and device thereof |
| 07/09/2009 | US20090175096 Semiconductor device and method for boosting word line |
| 07/09/2009 | US20090175094 Current sensing method and apparatus for a memory array |
| 07/09/2009 | US20090175093 Apparatus for controlling column selecting signal for semiconductor memory apparatus and method of controlling the same |
| 07/09/2009 | US20090175092 Semiconductor Memory Devices for Controlling Latency |
| 07/09/2009 | US20090175091 Apparatus and methods for an input circuit for a semiconductor memory apparatus |
| 07/09/2009 | US20090175090 Buffered DRAM |
| 07/09/2009 | US20090175084 Buffering systems for accessing multiple layers of memory in integrated circuits |
| 07/09/2009 | US20090175080 Flash EEprom System With Simultaneous Multiple Data Sector Programming and Storage of Physical Block Characteristics in Other Designated Blocks |
| 07/09/2009 | US20090175079 Structures and methods to store information representable by a multiple-bit binary word in electrically erasable, programmable read-only memory (eeprom) |
| 07/09/2009 | US20090175076 Memory device and method for estimating characteristics of multi-bit cell |
| 07/09/2009 | US20090175074 Device for reading a low-consumption non-volatile memory and its implementing method |
| 07/09/2009 | US20090175070 Dual node access storage cell having buffer circuits |
| 07/09/2009 | US20090175069 Storage cell having buffer circuit for driving the bitline |
| 07/09/2009 | US20090175066 High-speed DRAM including hierarchical read circuits |
| 07/09/2009 | US20090175065 Semiconductor memory device and method for fabricating the same |