Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
12/2009
12/10/2009US20090307437 Multiport Memory Architecture, Devices and Systems Including the Same, and Methods of Using the Same
12/10/2009US20090305432 Polypeptide Molecular Switch
12/10/2009US20090303824 Dynamic random access memory device and method for self-refreshing memory cells
12/10/2009US20090303823 Sense amp circuit, and semiconductor memory device using the same
12/10/2009US20090303822 Bit line equalizing control circuit of a semiconductor memory apparatus
12/10/2009US20090303821 Apparatus and Method for Low Power, Single-Ended Sensing in a Multi-Port SRAM Using Pre-Discharged Bit Lines
12/10/2009US20090303820 Apparatus and method for low power sensing in a multi-port sram using pre-discharged bit lines
12/10/2009US20090303819 Write and read assist circuit for sram with power recycling
12/10/2009US20090303816 Semiconductor memory apparatus and method of controlling redundancy thereof
12/10/2009US20090303813 Integrated circuit that stores first and second defective memory cell addresses
12/10/2009US20090303812 Programmable pulsewidth and delay generating circuit for integrated circuits
12/10/2009US20090303811 Row address decoder and semiconductor memory device having the same
12/10/2009US20090303810 Semiconductor memory device
12/10/2009US20090303809 Circuit and method for terminating data line of semiconductor integrated circuit
12/10/2009US20090303808 Semiconductor memory device and operation method thereof
12/10/2009US20090303807 Semiconductor device and semiconductor system having the same
12/10/2009US20090303806 Synchronous semiconductor memory device
12/10/2009US20090303805 Semiconductor memory device and method of controlling semiconductor memory device
12/10/2009US20090303804 Semiconductor device and method for driving the same
12/10/2009US20090303803 Independent Bi-Directional Margin Control Per Level and Independently Expandable Reference Cell Levels for Voltage Mode Sensing
12/10/2009US20090303802 Semiconductor memory module and semiconductor memory system having termination resistor units
12/10/2009US20090303801 Carbon nanotube memory including a buffered data path
12/10/2009US20090303798 Memory device and method
12/10/2009US20090303796 Semiconductor memory device
12/10/2009US20090303795 Memory device and method
12/10/2009US20090303791 Semiconductor Memory Device for Storing Multivalued Data
12/10/2009US20090303789 Dynamically configurable mlc state assignment
12/10/2009US20090303785 Phase change memory devices and read methods using elapsed time-based read voltages
12/10/2009US20090303777 Semiconductor memory device
12/10/2009US20090303776 Static random access memory cell
12/10/2009US20090303775 Static random access memory cell and devices using same
12/10/2009US20090303773 Multi-terminal reversibly switchable memory device
12/10/2009US20090303772 Two-Terminal Reversibly Switchable Memory Device
12/10/2009US20090303771 Radio frequency identification device initializing a memory using an offset voltage
12/10/2009US20090303770 Memory chip and semiconductor device
12/10/2009US20090303767 System, method and apparatus for memory with embedded associative section for computations
12/10/2009US20090302936 Amplifiers using gated diodes
12/10/2009US20090302357 Amplifiers using gated diodes
12/10/2009DE10220328B4 Schaltung zur Taktsignalerzeugung, zugehörige integrierte Schaltkreisbauelemente und Auffrischtaktsteuerverfahren Circuit for clock signal generation, associated integrated circuit devices and Auffrischtaktsteuerverfahren
12/10/2009DE10149387B4 Halbleiterspeicherbauelement mit Wortleitungs-Niederspannungszufuhrleitungen A semiconductor memory device having wordline low voltage supply lines
12/09/2009EP2130206A1 Read disturb reduction circuit for spin transfer torque magnetoresistive random access memory
12/09/2009EP1552314B1 Sense amplifier with configurable voltage swing control
12/09/2009CN201360386Y Losing-prevention U-disk cap
12/09/2009CN201359852Y Multifunctional USB flash drive
12/09/2009CN201359851Y USB flash drive with cash checker
12/09/2009CN201359682Y Watch
12/09/2009CN201357415Y Knife with USB flash disk
12/09/2009CN201356136Y USB flash drive necklace
12/09/2009CN101599299A Circuit and method for terminating data line of semiconductor integrated circuit
12/09/2009CN101599298A Security certification memory, terminal device and terminal device security certification method
12/09/2009CN101599297A Safety U disk
12/09/2009CN101599296A Portable memory-relative device with liquid ornament
12/09/2009CN101599295A Integrated storage device and control method thereof
12/09/2009CN101599294A Method for storing multiple virtual queues data based on FPGA
12/09/2009CN100568860C Apparatus for canceling intersymbol interference in semiconductor memory device and method thereof
12/09/2009CN100568396C Method for current sense amplifier calibration in MRAM devices
12/09/2009CN100568389C Semiconductor device for reducing coupling noise
12/09/2009CN100568386C Semiconductor memory device with ability to adjust impedance of data output driver
12/09/2009CN100568385C Delay control circuit and delay control method
12/09/2009CN100568383C A high speed DRAM architecture with uniform access execution time
12/09/2009CN100568382C First-in first-out memory
12/09/2009CN100568381C System and method for obtaining clocks in a memory system
12/09/2009CN100568380C Semiconductor memory device
12/09/2009CN100568379C Write circuit of memory device and method for driving semiconductor memory device
12/09/2009CN100568378C Integrate circuit memory and method for refreshing memory
12/09/2009CN100567903C Sensing services and sensing circuits
12/08/2009US7631231 Method and apparatus for testing the connectivity of a flash memory chip
12/08/2009US7631228 Using bit errors from memory to alter memory command stream
12/08/2009US7631140 Data accessing method, device in which the data accessing method is executed and recording medium
12/08/2009US7630272 Multiple port memory with prioritized world line driver and method thereof
12/08/2009US7630268 Dynamic semiconductor memory reducing the frequency of occurrence of refresh command request and refresh control method thereof
12/08/2009US7630267 Temperature detector in an integrated circuit
12/08/2009US7630266 Temperature compensation of memory signals using digital signals
12/08/2009US7630265 On-chip temperature sensor
12/08/2009US7630264 Memory device and testing with write completion detection
12/08/2009US7630263 Exploiting a statistical distribution of the values of an electrical characteristic in a population of auxiliary memory cells for obtaining reference cells
12/08/2009US7630262 One-transistor type dram
12/08/2009US7630261 Nand-structured flash memory
12/08/2009US7630260 Semiconductor memory and system
12/08/2009US7630257 Methods and systems for accessing memory
12/08/2009US7629811 Control circuit for controlling on-die termination impedance
12/03/2009WO2009114480A3 Digit line equilibration using access devices at the edge of sub-arrays
12/03/2009WO2009108279A3 Method and apparatus for accessing a multi-mode programmable resistance memory
12/03/2009US20090300313 Memory clearing apparatus for zero clearing
12/03/2009US20090296512 Apparatus for writing to mutiple banks of a memory device
12/03/2009US20090296510 Semiconductor memory device having refresh circuit and word line activating method therefor
12/03/2009US20090296509 Voltage regulator circuit for a memory circuit
12/03/2009US20090296508 Semiconductor memory apparatus
12/03/2009US20090296507 Memory power delivery noise suppression
12/03/2009US20090296506 Sense amplifier and data sensing method thereof
12/03/2009US20090296503 Read-leveling implementations for ddr3 applications on an fpga
12/03/2009US20090296502 Devices, systems, and methods for independent output drive strengths
12/03/2009US20090296501 Method and Apparatus for Implementing Write Levelization in Memory Subsystems
12/03/2009US20090296500 Memory circuit and control method thereof
12/03/2009US20090296499 Semiconductor memory device including a global input/output line of a data transfer path and its surrounding circuits
12/03/2009US20090296498 Memory access method and semiconductor memory device
12/03/2009US20090296497 Semiconductor memory device
12/03/2009US20090296496 Method and circuit for testing a multi-chip package
12/03/2009US20090296495 System and method for capturing data signals using a data strobe signal
12/03/2009US20090296494 Page-buffer and non-volatile semiconductor memory including page buffer
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