Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
12/2009
12/31/2009US20090323449 Circuit and method for controlling self-refresh cycle
12/31/2009US20090323448 Bias Sensing in Dram Sense Amplifiers Through Voltage-Coupling/Decoupling Device
12/31/2009US20090323447 Apparatus for measuring data setup/hold time
12/31/2009US20090323444 Semiconductor memory device and operating method thereof
12/31/2009US20090323443 Semiconductor memory device
12/31/2009US20090323442 Semiconductor memory device and reset control circuit of the same
12/31/2009US20090323441 Write Latency Tracking Using a Delay Lock Loop in a Synchronous DRAM
12/31/2009US20090323440 Data processing device and method of reading trimming data
12/31/2009US20090323439 Memory for storing a binary state
12/31/2009US20090323437 Method and Apparatus for Data Inversion in Memory Device
12/31/2009US20090323436 Refresh signal generating circuit
12/31/2009US20090323435 Time reduction of address setup/hold time for semiconductor memory
12/31/2009US20090323434 Combination memory device and semiconductor device
12/31/2009US20090323433 Data sensing method for dynamic random access memory
12/31/2009US20090323426 Semiconductor memory device
12/31/2009US20090323423 Methods, circuits and systems for reading non-volatile memory cells
12/31/2009US20090323420 Minimizing power noise during sensing in memory device
12/31/2009US20090323417 Semiconductor memory repairing a defective bit and semiconductor memory system
12/31/2009US20090323416 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
12/31/2009US20090323414 Method and Device for Storing Data
12/31/2009US20090323413 Voltage reference generator for flash memory
12/31/2009US20090323408 Methods for determining resistance of phase change memory elements
12/31/2009US20090323405 Controlled Value Reference Signal of Resistance Based Memory Circuit
12/31/2009US20090323403 Spin-transfer torque memory non-destructive self-reference read method
12/31/2009US20090323402 Spin-transfer torque memory self-reference read method
12/31/2009US20090323400 Semiconductor device
12/31/2009US20090323398 Semiconductor memory device comprising a plurality of static memory cells
12/31/2009US20090323397 Nonvolatile semiconductor memory device and reading method of nonvolatile semiconductor memory device
12/31/2009US20090323396 Semiconductor memory device
12/31/2009US20090323395 Semiconductor storage device
12/31/2009US20090323394 Pulse reset for non-volatile storage
12/31/2009US20090323393 Capacitive discharge method for writing to non-volatile memory
12/31/2009US20090323392 Smart detection circuit for writing to non-volatile storage
12/31/2009US20090323391 Reverse set with current limit for non-volatile storage
12/31/2009US20090323390 Semiconductor memory device
12/31/2009US20090323389 Masked memory cells
12/31/2009US20090323387 One-Time Programmable Memory and Operating Method Thereof
12/31/2009US20090323386 Methods and Systems for Reducing Heat Flux in Memory Systems
12/31/2009DE19954564B4 Steuerungsschaltung für die CAS-Verzögerung Control circuit for the CAS latency
12/31/2009DE19839089B4 Datenpuffer für einen programmierbaren Speicher mit mehreren Zuständen Data buffer for a programmable memory multi-state
12/31/2009DE102006052397B4 Nichtflüchtiger Halbleiterspeicher, nichflüchtiges Halbleiterspeicherelement, Verfahren zum Lesen einer Phasenwechsel-Speicherzelle und System A non-volatile semiconductor memory, nichflüchtiges semiconductor memory element, method of reading a phase change memory cell system and
12/30/2009WO2009158677A2 Pulse reset for non-volatile storage
12/30/2009WO2009158676A1 Capacitive discharge method for writing to non-volatile memory
12/30/2009WO2009158275A1 Dynamic power saving memory architecture
12/30/2009WO2008089159A3 Sense amplifier with stages to reduce capacitance mismatch in current mirror load
12/30/2009WO2008089158A3 Compensated current offset in a sensing circuit
12/30/2009EP2138927A2 Haptic effect provisionig for a mobile communication terminal
12/30/2009EP1673782B1 Mram array with segmented word and bit lines
12/30/2009CN201374193Y U disk with large capacity
12/30/2009CN201374192Y Flash memory device
12/30/2009CN201374169Y Recording advertisement back cushion capable of producing sound by touch
12/30/2009CN201371689Y Electronic present
12/30/2009CN201370526Y Toilet paper holder with MP3 function
12/30/2009CN101615428A Detection method in non-volatile memory and reading method
12/30/2009CN101615426A A programmable conductor random access memory and a method for writing thereto
12/30/2009CN101615422A Flash memory device for automatically switching memory interface modes
12/30/2009CN101615421A Multichannel mixed density memory storing device and control method thereof
12/30/2009CN101615420A Flash memory storing device with data correction function
12/30/2009CN100576351C Nonvolatile semiconductor memory devices
12/30/2009CN100576348C Method and test device for determining a repair solution for a memory module
12/30/2009CN100576342C High-capacity FLASH solid memory controller
12/30/2009CN100576341C Semiconductor memory device with ZQ calibration circuit and its operation method
12/30/2009CN100576340C DRAM stacked package, DIMM, and semiconductor manufacturing method
12/30/2009CN100576339C Multiple matching detection circuit and method for content addressable memory
12/30/2009CN100576338C System, equipment and method for dynamic power control for memory device thermal sensor
12/30/2009CN100576337C Method and storage device for the permanent storage of data
12/30/2009CA2726279A1 Dynamic power saving memory architecture
12/29/2009US7640466 Semiconductor integrated circuit device incorporating a data memory testing circuit
12/29/2009US7640465 Memory with element redundancy
12/29/2009US7640413 Detection circuit for mixed asynchronous and synchronous memory operation
12/29/2009US7640392 Non-DRAM indicator and method of accessing data not stored in DRAM array
12/29/2009US7640391 Integrated circuit random access memory capable of automatic internal refresh of memory array
12/29/2009US7639556 Bit line sense amplifier of semiconductor memory device having open bit line structure
12/29/2009US7639553 Data bus sense amplifier circuit
12/29/2009US7639552 Delay locked loop and semiconductor memory device with the same
12/29/2009US7639551 Sense amplifiers operated under hamming distance methodology
12/29/2009US7639550 Semiconductor memory device with bi-directional read and write data transport
12/29/2009US7639549 Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
12/29/2009US7639547 Semiconductor memory device for independently controlling internal supply voltages and method of using the same
12/29/2009US7639546 Nonvolatile memory utilizing MIS memory transistors with function to correct data reversal
12/29/2009US7639545 Memory word line driver featuring reduced power consumption
12/29/2009CA2322247C System and method for recording an image
12/28/2009CA2684753A1 Thread optimized multiprocessor architecture
12/24/2009US20090320106 Systems, apparatus, and methods for currency processing control and redemption
12/24/2009US20090319745 System and method for an asynchronous data buffer having buffer write and read pointers
12/24/2009US20090319719 System Having A Controller Device, A Buffer Device And A Plurality Of Memory Devices
12/24/2009US20090316514 Delay Locked Loop Implementation in a Synchronous Dynamic Random Access Memory
12/24/2009US20090316512 Block redundancy implementation in heirarchical ram's
12/24/2009US20090316511 Method and Apparatus for Selectively Disabling Termination Circuitry
12/24/2009US20090316510 Semiconductor device and data processing system
12/24/2009US20090316509 Memory with high speed sensing
12/24/2009US20090316506 Serially Decoded Digital Device Testing
12/24/2009US20090316504 Semiconductor integrated circuit for generating row main signal and controlling method thereof
12/24/2009US20090316503 Clock driver device and semiconductor memory apparatus having the same
12/24/2009US20090316502 Semiconductor memory device and operation method thereof
12/24/2009US20090316501 Memory malfunction prediction system and method
12/24/2009US20090316500 Memory Cell Employing Reduced Voltage
12/24/2009US20090316499 Semiconductor memory device operational processing device and storage system
12/24/2009US20090316498 Circuit and method for vdd-tracking cvdd voltage supply
12/24/2009US20090316497 Semiconductor device including nonvolatile memory
1 ... 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 ... 532