Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
07/2010
07/13/2010US7753842 In vivo imaging device with a small cross sectional area
07/13/2010CA2373641C Management apparatus, editing apparatus, recording medium, method, and audio data playback management system including management apparatus, editing apparatus and recording medium
07/08/2010WO2010078454A1 Variable memory refresh devices and methods
07/08/2010WO2010077776A1 Self-tuning of signal path delay in circuit employing multiple voltage domains
07/08/2010WO2010077611A1 Digitally-controllable delay for sense amplifier
07/08/2010WO2010076978A2 Transmission unit adopting a differential voltage driving system, transmission unit and receiving unit selectively adopting a differential current driving system, differential voltage driving system, and interface system
07/08/2010WO2010076966A2 Memory controller and memory management method
07/08/2010WO2010043032A8 A composite memory having a bridging device for connecting discrete memory devices to a system
07/08/2010US20100174932 Circuit, system and method for selectively turning off internal clock drivers
07/08/2010US20100172200 Memory device, memory controller and memory system
07/08/2010US20100172199 Balanced sense amplifier for single ended bitline memory architecture
07/08/2010US20100172198 Data storage element sensing device
07/08/2010US20100172196 Circuit for Generating Data Strobe Signal in DDR Memory Device and Method Therefor
07/08/2010US20100172195 Ultra-low-power variation-tolerant radiation-hardened cache design
07/08/2010US20100172194 Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus
07/08/2010US20100172192 Reference voltage generation circuit and semiconductor memory
07/08/2010US20100172191 Voltage Regulation Method and Memory Applying Thereof
07/08/2010US20100172190 Processor Arrays Made of Standard Memory Cells
07/08/2010US20100172189 Non-volatile semiconductor storage device
07/08/2010US20100172187 Robust sensing circuit and method
07/08/2010US20100172181 Page buffer circuit for electrically rewritable non-volatile semiconductor memory device and control method
07/08/2010US20100172174 Semiconductor device having architecture for reducing area and semiconductor system including the same
07/08/2010US20100172171 Resistance variable memory apparatus
07/08/2010DE10226583B4 DRAM-Speicherzelle für schnellen Schreib-/Lesezugriff und Speicherzellenfeld DRAM memory cell for fast read / write access and the memory cell array
07/07/2010EP2204817A1 Non-volatile memory with ovonic threshold switches
07/07/2010CN201523421U Light reflecting television remote controller
07/07/2010CN201522855U File system damage prevention device of SD card video recorder
07/07/2010CN201522854U Wooden retractable USB flash disk
07/07/2010CN201522732U Audio acquisition card and multi-channel audio remote acquisition system of voyage data recorder
07/07/2010CN1697082B Method for programming phase-change memory array to set state and circuit of a phase-change memory device
07/07/2010CN101772809A Method and circuit for preventing high voltage memory disturb
07/07/2010CN101770806A Sense amplifier used in the write operations of SRAM
07/07/2010CN101770802A Asymmetric sense amplifier
07/07/2010CN101770680A Disaster detection alarming device and alarming method thereof
07/07/2010CN101767498A Voice music paper product play device
07/07/2010CN101350218B Virtual multi-port memory as well as method for storing and reading data thereof
07/07/2010CN101123117B Non volatile memory device and its operation method
07/06/2010US7752655 Access control device and electronic device
07/06/2010US7752364 Apparatus and method for communicating with semiconductor devices of a serial interconnection
07/06/2010US7751269 Coupling device for transmitting data
07/06/2010US7751268 Sense amplifier power supply circuit
07/06/2010US7751267 Half-select compliant memory cell precharge circuit
07/06/2010US7751264 Memory repair system and method
07/06/2010US7751263 Data retention kill function
07/06/2010US7751262 High speed DRAM architecture with uniform access latency
07/06/2010US7751261 Method and apparatus for controlling read latency of high-speed DRAM
07/06/2010US7751260 Memory device having strobe terminals with multiple functions
07/06/2010US7751259 Semiconductor memory device having a plurality of chips and capability of outputting a busy signal
07/06/2010US7751258 Magnetic random access memory
07/06/2010US7751257 Semiconductor memory device
07/06/2010US7751256 Method and apparatus to prevent high voltage supply degradation for high-voltage latches of a non-volatile memory
07/06/2010US7751233 Method for efficiently driving a phase change memory device
07/06/2010US7751228 Dielectric relaxation memory
07/06/2010US7751222 Semiconductor memory device
07/06/2010US7750431 Phase change storage cells for memory devices
07/06/2010US7750334 Phase change memory device
07/01/2010WO2010074819A1 Controlled data access to non-volatile memory
07/01/2010WO2010039625A3 Common memory device for variable device width and scalable pre-fetch and page size
07/01/2010US20100169671 Cryptoprocessor with improved data protection
07/01/2010US20100165782 Memory system for selectively transmitting command and address signals
07/01/2010US20100165781 Internal write/read pulse generating circuit of a semiconductor memory apparatus
07/01/2010US20100165773 Semiconductor memory device for self refresh and memory system having the same
07/01/2010US20100165772 Self aligned back-gate for floating body cell memory erase
07/01/2010US20100165771 Semiconductor memory device
07/01/2010US20100165770 Semiconductor memory device
07/01/2010US20100165769 Semiconductor memory device having auto-precharge function
07/01/2010US20100165768 Bit line precharge circuit and a semiconductor memory apparatus using the same
07/01/2010US20100165767 Asymmetric Sense Amplifier
07/01/2010US20100165766 Semiconductor Memory Device
07/01/2010US20100165763 Semiconductor memory device
07/01/2010US20100165762 Semiconductor memory device and method for driving the same
07/01/2010US20100165761 Semiconductor memory device and method for driving the same
07/01/2010US20100165760 Data strobe signal noise protection apparatus and semiconductor integrated circuit
07/01/2010US20100165759 Semiconductor Memory Device and Operation Method Thereof
07/01/2010US20100165758 Semiconductor memory device and method for operating the same
07/01/2010US20100165757 Semiconductor memory device
07/01/2010US20100165755 Single-ended bit line based storage system
07/01/2010US20100165754 Signal synchronization in multi-voltage domains
07/01/2010US20100165753 Method and apparatus for reducing leakage in bit lines of a memory device
07/01/2010US20100165752 Level shifter
07/01/2010US20100165751 Data output device for semiconductor memory apparatus
07/01/2010US20100165750 Data input device of semiconductor memory appartus and control method thereof
07/01/2010US20100165749 Sense Amplifier Used in the Write Operations of SRAM
07/01/2010US20100165744 Semiconductor memory device
07/01/2010US20100165734 System and method for data recovery in a disabled integrated circuit
07/01/2010US20100165731 Memory device and operating method
07/01/2010US20100165729 Nonvolatile memory device and related methods of operation
07/01/2010US20100165727 Phase change material memory having no erase cycle
07/01/2010US20100165726 Discharge phase change material memory
07/01/2010US20100165725 Reliable set operation for phase-change memory cell
07/01/2010US20100165720 Verification circuits and methods for phase change memory array
07/01/2010US20100165719 Phase change memory device
07/01/2010US20100165718 Apparatus and method for sensing multi-level cell data
07/01/2010US20100165716 Nonvolatile memory with ovonic threshold switches
07/01/2010US20100165714 Method of storing an indication of whether a memory location in phase change memory needs programming
07/01/2010US20100165712 Method for low-stress multilevel reading of phase change memory cells and multilevel phase change memory
07/01/2010US20100165710 Random access memory architecture including midpoint reference
07/01/2010US20100165707 Read/Write Margin Improvement in SRAM Design Using Dual-Gate Transistors
07/01/2010US20100165706 Static memory cell having independent data holding voltage
07/01/2010US20100165705 Semiconductor integrated circuit
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