Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
08/2010
08/24/2010US7782656 SRAM with improved read/write stability
08/19/2010WO2010093921A2 Memory prefetch systems and methods
08/19/2010WO2010076966A3 Memory controller and memory management method
08/19/2010US20100208542 Clock divider and clock dividing method for a dll circuit
08/19/2010US20100208538 Sensing circuit for semiconductor memory
08/19/2010US20100208537 Dynamic random access memory (dram) refresh
08/19/2010US20100208536 Structure and Methods for Measuring Margins in an SRAM bit
08/19/2010US20100208535 Semiconductor memory device, memory module including the same, and data processing system
08/19/2010US20100208534 Semiconductor memory device, memory module including the same, and data processing system
08/19/2010US20100208533 Systems and methods for issuing address and data signals to a memory array
08/19/2010US20100208532 Memory circuit
08/19/2010US20100208531 Data reading circuit
08/19/2010US20100208530 Two Bits Per Cell Non-Volatile Memory Architecture
08/19/2010US20100208529 Memory with reduced power supply voltage for a write operation
08/19/2010US20100208528 Semiconductor device having nonvolatile memory element and data processing system including the same
08/19/2010US20100208520 Array and control method for flash based fpga cell
08/19/2010US20100208518 Mis-transistor-based nonvolatile memory circuit with stable and enhanced performance
08/19/2010US20100208517 Pin diode device and architecture
08/19/2010US20100208513 Memory with separate read and write paths
08/19/2010US20100208511 Memory Devices and Wireless Devices Including the Same
08/19/2010US20100208507 Luminescence device and method of manufacturing the same
08/19/2010US20100208506 Read only memory and method of reading same
08/19/2010US20100208505 Anti-cross-talk circuitry for rom arrays
08/19/2010US20100208504 Identification of data positions in magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices
08/19/2010US20100208112 Ramp generators and image sensors including the same
08/19/2010DE102006051292B4 Takterzeugungsschaltung, Multiphasen-Takterzeuger, Speicherelement, Verfahren zum Erzeugen von Taktsignalen und Verfahren zum Verriegeln der Phase Clock generation circuit, multi-phase clock generator, memory element, method for generating clock signals, and method for locking the phase
08/18/2010CN201556425U Portable player provided with compass
08/18/2010CN201556424U Expandable type solid hard disk device
08/18/2010CN201556423U Light energy mp3
08/18/2010CN201556417U Vehicle-mounted multimedia equipment based on PC platform
08/18/2010CN201556255U Mobile data terminal
08/18/2010CN201556253U Prepaid gas meter
08/18/2010CN201550625U Maternity wear with prenatal training function
08/18/2010CN1551235B Semiconductor device for domain crossing
08/18/2010CN101809668A System and method for processing signals in high speed dram
08/18/2010CN101807907A Semiconductor device and driving method of the same
08/18/2010CN101807427A Audio output system
08/18/2010CN101807426A Audio device and audio processing method
08/18/2010CN101807425A Blue light optical head
08/18/2010CN101807424A Multifunctional U disk and U disk system
08/18/2010CN101807423A Anti-deleted antivirus USB (Universal Serial Bus) interface commemorative disk and manufacturing method thereof
08/18/2010CN101807422A Readout amplifying circuit
08/18/2010CN101807058A Operational information recording and fault analysis apparatus for hybrid electric vehicle power train
08/18/2010CN101404177B Computation type memory with data processing capability
08/17/2010US7779315 Semiconductor memory device having a single input terminal to select a buffer and method of testing the same
08/17/2010US7779220 Password-based media cartridge authentication
08/17/2010US7779212 Method and apparatus for sending data from multiple sources over a communications bus
08/17/2010US7778422 Security associations for devices
08/17/2010US7778105 Memory with write port configured for double pump write
08/17/2010US7778101 Memory module and method of performing the same
08/17/2010US7778099 Semiconductor memory, memory system, and memory access control method
08/17/2010US7778098 Dummy cell for memory circuits
08/17/2010US7778097 AC coupling circuits including resistive feedback and related methods and devices
08/17/2010US7778096 Flash memory device
08/17/2010US7778095 Semiconductor memory device and method for driving the same
08/17/2010US7778094 Semiconductor memory device and latency signal generating method thereof
08/17/2010US7778093 Memory control circuit capable of dynamically adjusting deglitch windows, and related method
08/17/2010US7778092 Memory system and method having volatile and non-volatile memory devices at same hierarchical level
08/17/2010US7778091 Page buffer, memory device having the page buffer and method of operating the same
08/17/2010US7778090 Buffer circuit for a memory module
08/17/2010US7778089 Semiconductor memory device including write driver control circuit and write driver control method
08/17/2010US7778075 Semiconductor memory device
08/17/2010US7777706 Impulse driving apparatus and method for liquid crystal device
08/17/2010US7777529 Leakage compensation in dynamic flip-flop
08/12/2010WO2010091094A2 Stacked-die memory systems and methods for training stacked-die memory systems
08/12/2010US20100205386 Memory controller and memory control method
08/12/2010US20100203705 Semiconductor device with improved overlay margin and method of manufacturing the same
08/12/2010US20100202233 Semiconductor storage device and control method of the same
08/12/2010US20100202232 Refreshing method
08/12/2010US20100202231 Thermally stable reference voltage generator for mram
08/12/2010US20100202230 Memories with front end precharge
08/12/2010US20100202229 Method and apparatus for selective dram precharge
08/12/2010US20100202227 Reference voltage and impedance calibration in a multi-mode interface
08/12/2010US20100202226 Bank precharge signal generation circuit
08/12/2010US20100202225 Data input circuit technical field
08/12/2010US20100202224 Memory with data control
08/12/2010US20100202223 Memory interface and operation method of it
08/12/2010US20100202222 Semiconductor memory device
08/12/2010US20100202221 Method of reading memory cell
08/12/2010US20100202220 Memory circuits, systems, and methods for providing bit line equalization voltages
08/12/2010US20100202219 Burn-in methods for static random access memories and chips
08/12/2010US20100202218 System and Method for Level Shifter
08/12/2010US20100202213 Current-Mode Sense Amplifying Method
08/12/2010US20100202204 Page-buffer and non-volatile semiconductor memory including page buffer
08/12/2010US20100202203 Data restoration method for a non-volatile memory
08/12/2010US20100202196 Method of reading nonvolatile memory device and nonvolatile memory device for implementing the method
08/12/2010US20100202195 Phase change memory
08/12/2010US20100202194 Dynamically allocable regions in non-volatile memories
08/12/2010US20100202193 Non-volatile memory device
08/12/2010US20100202190 Compact and highly efficient dram cell
08/12/2010US20100202189 Semiconductor memory device having a discharge path generator for global i/o lines
08/12/2010US20100202188 Low read current architecture for memory
08/12/2010US20100202185 Nonvolatile memory device and method of writing data to nonvolatile memory device
08/12/2010US20100202184 One-Time Programmable Fuse with Ultra Low Programming Current
08/12/2010US20100202183 High reliability otp memory
08/12/2010US20100202182 Memory devices, systems and methods using multiple 1/n page arrays and multiple write/read circuits
08/12/2010US20100202180 Memory module cutting off dm pad leakage current
08/12/2010US20100202179 Memory device
08/12/2010DE102009044374A1 Speichermodul einer Datenverarbeitungsvorrichtung mit der Funktion des Verhinderns von Leckstrom Memory module of a data processing apparatus having the function of preventing leakage current
08/11/2010EP1446910B1 Phase adjustment apparatus and method for a memory device signaling system