Patents
Patents for G11C 16 - Erasable programmable read-only memories (44,373)
12/1997
12/10/1997EP0811986A1 Page-mode memory device with multiple-level memory cells
12/10/1997EP0811982A2 Non-volatile ferroelectric memory device for storing data bits restored upon power-on and intermittently refreshed
12/10/1997EP0811981A2 Method of controlling non-volatile ferroelectric memory cell for inducing a large amount of electric charge representative of data bit
12/09/1997US5696731 Semiconductor memory device using internal voltage obtained by boosting supply voltage
12/09/1997US5696730 First read cycle circuit for semiconductor memory
12/09/1997US5696728 Negative voltage level shift circuit
12/09/1997US5696717 Nonvolatile integrated circuit memory devices having adjustable erase/program threshold voltage verification capability
12/09/1997US5696716 Programmable memory element
12/04/1997WO1997045958A1 Configurable integrated circuit pins
12/03/1997EP0809849A1 On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same
12/03/1997EP0809847A2 Multi-valued read-only storage location with improved signal-to-noise ratio
12/03/1997CN1166887A Sensing state of a memory by variable gate voltage
12/03/1997CN1166650A Method of loading software program into EEPROM
12/02/1997US5694611 Microcomputer including internal and direct external control of EEPROM and method of making the microcomputer
12/02/1997US5694538 Memory rewriting apparatus
12/02/1997US5694366 OP amp circuit with variable resistance and memory system including same
12/02/1997US5694360 Write to flash EEPROM built in microcomputer
12/02/1997US5694359 Flash memory device
12/02/1997US5694358 Nonvolatile semiconductor memory device
12/02/1997US5694357 Nonvolatile semiconductor memory device for storing multi-value data
12/02/1997US5694356 High resolution analog storage EPROM and flash EPROM
12/02/1997US5693570 Process for manufacturing a programmable power generation circuit for flash EEPROM memory systems
11/1997
11/27/1997WO1997044792A1 Flash memory device with multiple checkpoint erase suspend logic
11/27/1997WO1997044791A1 Flash memory erase with controlled band-to-band tunneling current
11/26/1997EP0809256A2 Method and circuit for linearized reading of analog floating gate storage cell
11/26/1997EP0809254A1 Line decoder for memory devices
11/26/1997EP0809253A2 Data latching circuit for read-out operations of data from memory device
11/26/1997EP0809186A2 Method and apparatus of redundancy for non-volatile memory integrated circuits
11/26/1997EP0808502A1 Fast-sensing amplifier for flash memory
11/26/1997EP0808501A1 Filtered serial event controlled command port for flash memory
11/26/1997EP0808500A2 Eeprom and method of controlling same
11/26/1997EP0698271A4 Memory core organization
11/25/1997US5692138 Flexible user interface circuit in a memory device
11/25/1997US5691944 Non-volatile semiconductor memory device
11/25/1997US5691941 Nonvolatile semiconductor memory cell capable of saving overwritten cell and its saving method
11/25/1997US5691939 Semiconductor memory cell
11/25/1997US5691938 Non-volatile memory cell and array architecture
11/25/1997US5691552 Nonvolatile semiconductor memory formed with silicon-on-insulator structure
11/20/1997WO1997043765A1 Audio storing and reproducing apparatus
11/19/1997EP0808014A2 A voltage booster circuit
11/19/1997EP0807936A2 Nonvolatile semiconductor memory device capable of supplying erasing voltage to a flash memory cell
11/18/1997US5689676 Sequential EEPROM writing apparatus which sequentially and repetitively replaces a head position pointer with a last position pointer
11/18/1997US5689470 Semiconductor memory device and method for accessing a memory in the same
11/18/1997US5689468 Semiconductor memory device and method for driving the same
11/18/1997US5689463 Semiconductor memory device
11/18/1997US5689459 Low voltage one transistor flash EEPROM cell using Fowler-Nordheim programming and erase
11/18/1997US5689453 Data storing apparatus having a memory capable of storing analog data
11/13/1997WO1997016886A3 Control gate-addressed cmos non-volatile memory cell that programs through gates of cmos transistors
11/13/1997DE19612456A1 Halbleiterspeichervorrichtung A semiconductor memory device
11/12/1997EP0806773A1 Electrically erasable and programmable non-volatile memory device with testable redundancy circuits
11/12/1997EP0806772A2 Method and apparatus for providing erasing and programming protection for electrically erasable programmable read only memory
11/12/1997EP0806771A1 UPROM cell for low voltage supply
11/12/1997EP0806083A1 Mos circuit for switching high voltages on a semiconductor chip
11/12/1997EP0806045A1 Decoded wordline driver with positive and negative voltage modes
11/12/1997EP0528280B1 Memory card apparatus
11/12/1997CN1164926A High speed, low voltage non-volatile memory
11/11/1997US5687352 Memory device controlled by control signals in the form of gray code
11/11/1997US5687345 Microcomputer having CPU and built-in flash memory that is rewritable under control of the CPU analyzing a command supplied from an external device
11/11/1997US5687135 Count unit for nonvolatile memories
11/11/1997US5687126 Semiconductor device
11/11/1997US5687124 Circuit for identifying a memory cell having erroneous data stored therein
11/11/1997US5687121 Flash EEPROM worldline decoder
11/11/1997US5687120 Low voltage one transistor flash eeprom cell using fowler-nordheim programming and erase
11/11/1997US5687118 PMOS memory cell with hot electron injection programming and tunnelling erasing
11/11/1997US5687117 Segmented non-volatile memory array with multiple sources having improved source line decode circuitry
11/11/1997US5687116 Programming pulse ramp control circuit
11/11/1997US5687115 Write circuits for analog memory
11/11/1997US5687114 Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell
11/11/1997US5687112 Multibit single cell memory element having tapered contact
11/11/1997US5686844 Integrated circuit pins configurable as a clock input pin and as a digital I/O pin or as a device reset pin and as a digital I/O pin and method therefor
11/06/1997WO1997041640A1 Stabilization circuits for multiple digital bits
11/05/1997EP0805456A1 Biasing circuit for UPROM cells with low voltage supply
11/05/1997EP0805454A1 Sensing circuit for reading and verifying the content of a memory cell
11/04/1997US5684747 Method for erasing nonvolatile semiconductor memory device incorporating redundancy memory cells
11/04/1997US5684741 Auto-verification of programming flash memory cells
11/04/1997US5684740 Semiconductor memory and method for substituting a redundancy memory cell
10/1997
10/30/1997WO1997040502A1 Process for operating a controller with a programmable memory
10/30/1997WO1997040501A1 Programmable read-only memory with improved access time
10/30/1997WO1997040499A1 Multibit single cell memory having tapered contact
10/30/1997DE19616053A1 Verfahren zum Betreiben eines Steuergerätes mit einer programmierbaren Speichereinrichtung A method for operating a control unit with a programmable memory means
10/30/1997DE19531683C2 Flash-Speicher mit Datenauffrischfunktion und Datenauffrischverfahren eines Flash-Speichers Flash memory with Datenauffrischfunktion and Datenauffrischverfahren a flash memory
10/29/1997CN1163461A Data detecting device for multiple bit unit and method
10/28/1997US5682496 Filtered serial event controlled command port for memory
10/28/1997US5682353 Self adjusting sense amplifier clock delay circuit
10/28/1997US5682350 Flash memory with divided bitline
10/28/1997US5682349 Failure tolerant memory device, in particular of the flash EEPROM type
10/28/1997US5682348 Programming switch for non-volatile memory
10/28/1997US5682347 Data reading method in semiconductor storage device capable of storing three-or multi-valued data in one memory cell
10/28/1997US5682346 Nonvolatile semiconductor memory device having suitable writing efficiency
10/23/1997WO1997039391A1 Process for automatic documentation of the operation of programming the memory of a programmable controller
10/23/1997DE19615105A1 Verfahren zum Betreiben eines Steuergerätes mit einer programmierbaren Speichereinrichtung A method for operating a control unit with a programmable memory means
10/22/1997EP0802569A1 FLASH-EPROM integrated with EEPROM
10/22/1997EP0802540A2 Multilevel memory system
10/22/1997EP0802479A2 Method an apparatus for programming a flash EEPROM
10/22/1997EP0801795A1 Advanced program verify for page mode flash memory
10/21/1997US5680353 EPROM memory with internal signature concerning, in particular, the programming mode
10/21/1997US5680352 Circuit for generating a delayed standby signal in response to an external standby command
10/21/1997US5680350 Method for narrowing threshold voltage distribution in a block erased flash memory array
10/21/1997US5680349 Nonvolatile semiconductor memory device having row decoder supplying a negative potential to word lines during erase mode
10/21/1997US5680348 Power supply independent current source for FLASH EPROM erasure