| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 04/10/1984 | US4442488 Instruction cache memory system |
| 04/10/1984 | US4442487 Three level memory hierarchy using write and share flags |
| 04/10/1984 | US4442486 Protected programmable apparatus |
| 04/10/1984 | US4442484 Microprocessor memory management and protection mechanism |
| 04/10/1984 | US4442345 Apparatus for and method of recycling recording carriers, such as credit cards, including non-volatile erasable memories for identification data |
| 04/10/1984 | CA1165458A1 Interface for controlling information transfers between main data processing system units and a central subsystem |
| 04/10/1984 | CA1165456A1 Local bus interface for controlling information transfer between units in a central subsystem |
| 04/10/1984 | CA1165454A1 Odd byte memory accessing in data processing apparatus |
| 04/10/1984 | CA1165451A1 Refresh and error detection and correction technique for a data processing system |
| 04/04/1984 | EP0104840A2 Multiprocessor system including firmware |
| 04/04/1984 | EP0104588A2 Peripheral storage system having multiple data transfer rates |
| 04/04/1984 | EP0104545A2 Input and output port control unit |
| 04/03/1984 | US4441155 Page controlled cache directory addressing |
| 04/03/1984 | US4441152 Data processing system having ring-like connected multiprocessors relative to key storage |
| 04/03/1984 | CA1165007A1 Microcomputer apparatus with video display capability |
| 04/03/1984 | CA1164649A1 Apparatus for determining dimensions |
| 03/28/1984 | EP0103813A2 Memory system and method for access in the same |
| 03/27/1984 | US4439830 In a data processing system |
| 03/27/1984 | US4439829 Data processing machine with improved cache memory management |
| 03/27/1984 | EP0040219A4 Data processor having common monitoring and memory loading and checking means. |
| 03/27/1984 | CA1164574A1 Allocation controller providing for access of multiple common resources by a duplex plurality of central processing units |
| 03/27/1984 | CA1164573A1 Arbitration controller providing for access of a common resource by a plurality of central processing units |
| 03/27/1984 | CA1164563A1 Random access memory arrangements |
| 03/21/1984 | EP0103132A2 Buffer storage control system |
| 03/20/1984 | US4438512 Method and apparatus for verifying storage apparatus addressing |
| 03/20/1984 | US4438493 Multiwork memory data storage and addressing technique and apparatus |
| 03/15/1984 | WO1984001043A1 Method and apparatus for handling interprocessor calls in a multiprocessor system |
| 03/13/1984 | US4437155 Cache/disk subsystem with dual aging of cache entries |
| 03/13/1984 | US4437149 Information processing system |
| 03/13/1984 | US4437127 Document information filing system |
| 03/13/1984 | CA1163722A1 Shared peripheral processing system |
| 03/13/1984 | CA1163690A1 Supervisory control of peripheral subsystems |
| 03/06/1984 | US4435778 Method for editing spatially related data in an interactive text processing system |
| 03/06/1984 | US4435754 Method of selecting PROM data for selective mapping system |
| 02/28/1984 | US4434502 Memory system handling a plurality of bits as a unit to be processed |
| 02/28/1984 | US4434464 For use in a data processing system |
| 02/28/1984 | US4434459 Data processing system having instruction responsive apparatus for both a basic and an extended instruction set |
| 02/28/1984 | US4434437 Generating angular coordinate of raster scan of polar-coordinate addressed memory |
| 02/22/1984 | EP0100943A2 Hierarchical memory system |
| 02/22/1984 | EP0100825A2 True single error correction and multiple error detection system |
| 02/21/1984 | US4433394 First-in first-out storage and processing unit making use thereof |
| 02/21/1984 | US4433389 Memory address translation system for accessing memory locations via job names |
| 02/21/1984 | US4433374 In a data processing system |
| 02/21/1984 | US4433207 Cryptographic decoder for computer programs |
| 02/21/1984 | CA1162655A1 Memory protection system using capability registers |
| 02/21/1984 | CA1162648A1 Low-power battery backup circuit for semiconductor memory |
| 02/16/1984 | WO1984000630A1 Virtual memory addressing system and method |
| 02/16/1984 | WO1984000629A1 Multi-dimensional-access memory system |
| 02/14/1984 | US4432067 Memory cartridge for video game system |
| 02/14/1984 | US4432057 Method for operating a computing apparatus |
| 02/14/1984 | US4432056 Programmable electronic computer |
| 02/14/1984 | US4432055 Memory subsystem for use in a system |
| 02/14/1984 | US4432053 Address generating apparatus and method |
| 02/07/1984 | US4430748 Image thresholding system |
| 02/07/1984 | US4430727 Storage element reconfiguration |
| 02/07/1984 | US4430725 Method for displaying source and destination file headers for easy comparison of proposed header changes |
| 02/07/1984 | US4430712 Adaptive domain partitioning of cache memory space |
| 02/07/1984 | US4430709 Apparatus for safeguarding data entered into a microprocessor |
| 02/07/1984 | US4430705 Authorization mechanism for establishing addressability to information in another address space |
| 02/07/1984 | US4430702 Network access device |
| 02/07/1984 | US4430701 Method and apparatus for a hierarchical paging storage system |
| 02/07/1984 | US4430651 Expandable and contractible local area network system |
| 02/07/1984 | US4430584 Modular input/output system |
| 02/07/1984 | CA1161962A1 Dual port exchange memory between multiple microprocessors |
| 02/02/1984 | WO1984000426A1 Database management system for controlling concurrent access to a database |
| 02/01/1984 | EP0099620A2 Memory controller with data rotation arrangement |
| 02/01/1984 | EP0099462A2 Apparatus and method for buffering data in a data processing system |
| 02/01/1984 | EP0099407A1 Digital system including line activity detection. |
| 01/31/1984 | US4429372 Method for integrating structured data and string data on a text processing system |
| 01/31/1984 | US4429363 Method and apparatus for managing data movements from a backing store to a caching buffer store |
| 01/25/1984 | EP0099244A2 Partitionable multiprocessing systems |
| 01/25/1984 | EP0099125A2 Multicomputer system having dual common memories |
| 01/25/1984 | EP0098928A2 Method and apparatus for logging journal data using a log write ahead data set |
| 01/24/1984 | US4428068 IC with built-in electrical quality control flag |
| 01/24/1984 | US4428064 Controlling buffered peripheral subsystems |
| 01/24/1984 | US4428060 Shift register latch circuit means for check and test purposes and contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniques |
| 01/24/1984 | US4428045 Apparatus for specifying and resolving addresses of operands in a digital data processing system |
| 01/24/1984 | CA1161172A1 Cache memory utilizing selective clearing and least recently used updating |
| 01/19/1984 | WO1984000225A1 Method for scrambling digital information and device for implementing such method |
| 01/17/1984 | US4426688 Memory system having an alternate memory |
| 01/17/1984 | US4426682 Fast cache flush mechanism |
| 01/17/1984 | US4426681 Process and device for managing the conflicts raised by multiple access to same cache memory of a digital data processing system having plural processors, each having a cache memory |
| 01/11/1984 | EP0098172A2 Register control processing system |
| 01/11/1984 | EP0098168A2 Address translation buffer control system |
| 01/11/1984 | EP0097790A2 Apparatus for controlling storage access in a multilevel storage system |
| 01/10/1984 | US4425615 Hierarchical memory system having cache/disk subsystem with command queues for plural disks |
| 01/10/1984 | CA1160351A1 Virtual memory terminal |
| 01/10/1984 | CA1160350A1 Multi-programming data processing system process suspension |
| 01/04/1984 | EP0097621A1 Method for disguising digital information, and device for performing the same |
| 01/04/1984 | EP0097256A2 Method and apparatus for managing a buffer pool referenced by batch and interactive process |
| 01/04/1984 | EP0097234A2 Method and apparatus for restarting a computing system |
| 01/04/1984 | EP0097159A1 Two bit per symbol sec/ded code. |
| 01/03/1984 | US4424564 Data processing system providing dual storage of reference bits |
| 01/03/1984 | US4424562 Data processing system having plural address arrays |
| 01/03/1984 | US4424561 Odd/even bank structure for a cache memory |
| 01/03/1984 | CA1159965A1 Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys |
| 01/03/1984 | CA1159963A1 Programmable i/o device identification |
| 01/03/1984 | CA1159960A1 Error detecting and correcting ram assembly |
| 01/03/1984 | CA1159958A1 Dual function ecc system with block check byte |
| 12/28/1983 | EP0096783A2 Method for storing data words in fault tolerant memory to recover uncorrectable errors |