Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
12/1984
12/18/1984US4489381 Hierarchical memories having two ports at each subordinate memory level
12/18/1984US4489380 Write protected memory
12/18/1984US4489378 Automatic adjustment of the quantity of prefetch data in a disk cache operation
12/12/1984EP0127772A2 Method and apparatus for processing messages in a computing system
12/12/1984EP0127640A1 Virtual memory data processor
12/11/1984US4488298 Multi-bit error scattering arrangement to provide fault tolerant semiconductor static memories
12/11/1984US4488257 Method for confirming incorporation of a memory into microcomputer system
12/11/1984US4488256 Memory management unit having means for detecting and preventing mapping conflicts
12/11/1984US4488228 Virtual memory data processor
12/11/1984US4488223 Control apparatus for a plurality of memory units
12/11/1984US4488222 For a computer system
12/11/1984US4488001 Intellectual properties protection device
12/05/1984EP0127440A2 Integrated circuit device incorporating a data processing unit and a ROM storing applications program therein
12/05/1984EP0127118A1 Memory control device, in particular for fault tolerant telephone exchange systems
12/05/1984EP0126976A2 Multiprocessor system with communicating random access shared memory
12/05/1984EP0126896A1 Hybrid-associative memory comprising a non associative base memory and associative surface
12/04/1984US4486881 Device for real-time correction of errors in data recorded on a magnetic medium
12/04/1984US4486855 Activity detector usable with a serial data link
12/04/1984US4486834 Multi-computer system having dual common memory
12/04/1984US4486831 Multi-programming data processing system process suspension
12/04/1984US4486825 Circuit arrangement for extended addressing of a microprocessor system
12/04/1984CA1179068A1 Error correcting code processing system
11/1984
11/28/1984EP0126122A1 Data base locking.
11/27/1984US4485471 Method of memory reconfiguration for fault tolerant memory
11/27/1984US4485457 For use in a video game system
11/27/1984US4485456 Data processor with R/W memory write inhibit signal
11/27/1984US4485437 Testing the presence of a peripheral device
11/27/1984CA1178685A1 Data transmitting link
11/21/1984EP0125855A2 Buffer-storage control system
11/21/1984EP0026980B1 Method of rewriting data in a magnetic bubble memory having a major-minor loop organisation
11/20/1984US4484309 Magnetic bubble memory device
11/20/1984US4484275 Multiprocessor system
11/20/1984US4484273 Modular computer system
11/20/1984US4484270 Centralized hardware control of multisystem access to shared and non-shared subsystems
11/20/1984US4484267 Cache sharing control in a multiprocessor
11/20/1984US4484265 Corner turn memory address generator
11/20/1984US4484263 Communications controller
11/20/1984US4484262 System for effecting communication
11/14/1984EP0124799A2 Memory access arrangement in a data processing system
11/13/1984US4483003 Fast parity checking in cache tag memory
11/13/1984US4483001 Online realignment of memory faults
11/13/1984US4482954 Signal processor device with conditional interrupt module and multiprocessor system employing such devices
11/13/1984US4482953 Computer with console addressable PLA storing control microcode and microinstructions for self-test of internal registers and ALU
11/13/1984US4482952 Virtual addressing system using page field comparisons to selectively validate cache buffer data on read main memory data
11/13/1984CA1177912A1 Mos comparator circuit
11/07/1984EP0124097A2 Method for storing and retrieving data in a data base
11/07/1984EP0123955A1 Circuit for memories to store information with validity index
11/07/1984EP0123783A2 Apparatus for compressing and buffering data
11/06/1984US4481603 Method for processing a file of information
11/06/1984US4481579 Digital data apparatus having a plurality of selectively addressable peripheral units
11/06/1984US4481576 Method of storing data in a memory of a data processing system
11/06/1984US4481573 Shared virtual address translation unit for a multiprocessor system
11/06/1984US4481570 Automatic multi-banking of memory for microprocessors
10/1984
10/31/1984EP0123411A1 Parallel processing of simultaneous ultrasound vectors
10/31/1984EP0123248A2 Expandable mapped memory control
10/31/1984EP0123169A1 Hybrid-associative memory comprising a non associative base memory and an associative surface
10/31/1984EP0034180B1 Special address generation arrangement
10/30/1984US4480315 Dynamically controllable addressing in automatic test equipment
10/25/1984WO1984004180A1 Method of handling power failure in apparatus employing absolute position feedback
10/25/1984EP0056400A4 Memory security circuit.
10/24/1984EP0122773A2 Arbitrator circuit and technique for use in a digital computing system having multiple bus controllers
10/23/1984US4479214 System for updating error map of fault tolerant memory
10/23/1984US4479180 Digital memory system utilizing fast and slow address dependent access cycles
10/23/1984US4479178 Quadruply time-multiplex information bus
10/17/1984EP0121700A2 Multiprocessor storage serialization apparatus
10/16/1984US4477881 Method of retrieving and editing distributed information
10/16/1984US4477871 Global operation coordination method and circuit
10/16/1984US4477164 Camera system operable in accordance with stored memory
10/16/1984CA1176382A1 Method and system for handling sequential data in a hierarchical store
10/16/1984CA1176381A1 Dynamically assignable i/o controller cache
10/16/1984CA1176377A1 Guest architectural support in a computer system
10/16/1984CA1176371A1 Redundancy scheme for an mos memory
10/11/1984WO1984003990A1 Memory readout control system
10/11/1984WO1984003970A1 Hybrid associative memory and method for the retrieval and sorting of data contained therein
10/11/1984WO1984003968A1 Apparatus for controlling access to a memory
10/10/1984EP0121381A2 Memory identification apparatus
10/10/1984EP0121373A2 Multilevel controller for a cache memory interface in a multiprocessing system
10/10/1984EP0121372A2 Hierarchy of control stores for overlapped data transmission
10/10/1984EP0121072A2 Method for accessing a data set in a word processing system
10/10/1984EP0121030A1 Arbitration device for the allocation of a common resource to a selected unit of a data processing system
10/10/1984EP0120914A1 Multiprocessor computing system featuring shared global control.
10/09/1984US4476528 Method and apparatus for controlling a data access in a data base management system
10/09/1984US4476526 Cache buffered memory subsystem
10/09/1984US4476524 Page storage control methods and means
10/09/1984US4476522 Programmable peripheral processing controller with mode-selectable address register sequencing
10/03/1984EP0120745A1 Apparatus permitting memory access timesharing by a plurality of users
10/03/1984EP0120721A1 Word memory with an address transcoding circuit
10/03/1984EP0120525A2 Memory pack addressing system
10/03/1984EP0120371A2 Fault alignment control system and circuits
10/03/1984EP0120186A2 Apparatus for automatic instruction parity error recovery
10/03/1984EP0120185A2 Computing apparatus and method for translating into a linear query a graphic language query
10/02/1984US4475194 Dynamic replacement of defective memory words
10/02/1984US4475176 Memory control system
10/02/1984CA1175581A1 Data processing machine with improved cache memory management
10/02/1984CA1175580A1 Odd/even bank structure for a cache memory
10/02/1984CA1175579A1 Method and apparatus for discarding data from a buffer after reading such data
10/02/1984CA1175502A1 Electronic security memory
09/1984
09/27/1984WO1984003783A1 System for connecting and controlling external devices
09/26/1984EP0119806A2 Asynchronous checkpointing method for error recovery
09/25/1984US4473902 Error correcting code processing system