Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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12/18/1979 | US4179751 Memory apparatus for disaster preventing system |
12/18/1979 | US4179738 Programmable control latch mechanism for a data processing system |
12/04/1979 | US4177510 Protection of data in an information multiprocessing system by implementing a concept of rings to represent the different levels of privileges among processes |
11/27/1979 | US4175692 Error correction and detection systems |
11/20/1979 | CA1066813A1 Method of generating addresses to a paged memory |
11/15/1979 | WO1979000959A1 A computer system having enhancement circuitry for memory accessing |
11/13/1979 | US4174537 Time-shared, multi-phase memory accessing system having automatically updatable error logging means |
11/13/1979 | CA1066424A1 Data comparison system |
11/06/1979 | US4173783 Method of accessing paged memory by an input-output unit |
11/06/1979 | US4173781 System of coherent management of exchanges between two contiguous levels of a hierarchy of memories |
10/23/1979 | US4172283 Computer system comprising at least two individual computers and at least one system bus bar |
10/09/1979 | CA1064162A1 Selective addressing system |
10/02/1979 | US4170039 Virtual address translation speed up technique |
09/25/1979 | US4169289 Data processor with improved cyclic data buffer apparatus |
09/25/1979 | US4169284 Cache control for concurrent access |
09/18/1979 | US4168541 Paired least recently used block replacement system |
09/18/1979 | US4168396 Microprocessor for executing enciphered programs |
09/11/1979 | US4167782 Continuous updating of cache store |
09/11/1979 | CA1062376A1 Memory control system |
09/05/1979 | EP0003744A1 Central memory composed of differing types of memories |
08/28/1979 | US4166211 Error control system for named data |
08/28/1979 | CA1061440A1 Call processing restoration arrangement for telephone switching system |
08/14/1979 | US4164786 Apparatus for expanding memory size and direct memory addressing capabilities of digital computer means |
08/14/1979 | CA1060583A1 Data memory for an independent portable device_ |
08/14/1979 | CA1060582A1 Data transmission system using independent portable device for data collecting and storage |
08/07/1979 | US4164041 Memory organization to distribute power dissipation and to allow single circuit pack memory growth |
08/07/1979 | CA1060108A1 Test code generator |
07/31/1979 | US4163288 Associative memory |
07/31/1979 | US4163281 Method and apparatus for the rotation of a binary-data matrix, intended particularly to be used as a storage unit having a two-way access mode for electronic computers |
07/31/1979 | US4163280 Address management system |
07/31/1979 | US4163147 Double bit error correction using double bit complementing |
07/31/1979 | CA1059643A1 Circuit for implementing a modified lru replacement algorithm for a cache |
07/31/1979 | CA1059642A1 Random access memory for image processing operations |
07/31/1979 | CA1059638A1 Fail soft memory |
07/24/1979 | CA1059237A1 Apparatus for detecting and correcting errors in an encoded memory word |
07/17/1979 | CA1058768A1 Accessing of a modified word organized random access memory |
07/10/1979 | US4161036 Method and apparatus for random and sequential accessing in dynamic memories |
07/10/1979 | US4161024 Private cache-to-CPU interface in a bus oriented data processing system |
06/19/1979 | US4158883 Refresh control system |
06/19/1979 | CA1056954A1 Memory access technique |
06/19/1979 | CA1056952A1 Error detection and correction in data processing systems |
06/13/1979 | EP0002390A1 Method for cryptographic file security in multiple domain data processing systems |
06/13/1979 | EP0002388A1 Data processing terminal |
06/12/1979 | US4158240 Method and system for data conversion |
06/12/1979 | US4158227 Paged memory mapping with elimination of recurrent decoding |
06/05/1979 | US4157587 High speed buffer memory system with word prefetch |
06/05/1979 | US4157586 Technique for performing partial stores in store-thru memory configuration |
05/29/1979 | US4156927 Digital processor system with direct access memory |
05/29/1979 | US4156925 Overlapped and interleaved control store with address modifiers |
05/29/1979 | US4156906 Buffer store including control apparatus which facilitates the concurrent processing of a plurality of commands |
05/29/1979 | US4156905 Method and apparatus for improving access speed in a random access memory |
05/29/1979 | CA1055615A1 Protection of information in a multiprogram multiprocessor computer system |
05/29/1979 | CA1055611A1 Uniform decoding of minimum-redundancy codes |
05/22/1979 | US4156290 Speedup addressing device by detecting repetitive addressing |
05/15/1979 | US4155119 Method for providing virtual addressing for externally specified addressed input/output operations |
05/08/1979 | US4153951 Event marker having extremely small bit storage requirements |
05/08/1979 | CA1054254A1 Signal transferring |
05/01/1979 | US4152764 Floating-priority storage control for processors in a multi-processor system |
05/01/1979 | CA1053806A1 High speed information processing system |
05/01/1979 | CA1053804A1 Fault tolerant least recently used algorithm logic |
04/24/1979 | US4151598 Priority assignment apparatus for use in a memory controller |
04/24/1979 | US4151593 Memory module with means for controlling internal timing |
04/24/1979 | US4151375 System for selectively shifting groups of bits for temporary storage in a processor memory of a telephone exchange |
04/24/1979 | CA1053375A1 Computer system |
04/24/1979 | CA1053352A1 Method for providing a substitute memory module in a data processing system |
04/17/1979 | US4150430 Information selection device |
04/17/1979 | US4150364 Parallel access memory system |
04/10/1979 | US4149245 High speed store request processing control |
04/10/1979 | US4149239 Secondary storage facility for connecting to a digital data processing system by separate control information and data transfer paths |
03/20/1979 | US4145761 Ram retention during power up and power down |
03/20/1979 | US4145753 Comparing apparatus for variable length word |
03/20/1979 | US4145745 Address conversion device for secondary memories |
03/20/1979 | US4145738 Plural virtual address space processing system |
03/20/1979 | CA1051121A1 Overlapping access to memory modules |
03/13/1979 | US4144563 Microprocessor system |
02/27/1979 | US4142234 Bias filter memory for filtering out unnecessary interrogations of cache directories in a multiprocessor system |
02/27/1979 | CA1049659A1 Combinational logic arrangement |
02/20/1979 | US4141068 Auxiliary ROM memory system |
02/20/1979 | US4141067 Multiprocessor system with cache memory |
02/13/1979 | US4139148 Double bit error correction using single bit error correction, double bit error detection logic and syndrome bit memory |
02/08/1979 | WO1979000035A1 Apparatus for use with a data processor for defining a cyclic data buffer |
02/06/1979 | US4138738 Self-contained relocatable memory subsystem |
02/06/1979 | US4138720 Time-shared, multi-phase memory accessing system |
02/06/1979 | CA1048159A1 Address extending control unit |
01/23/1979 | US4136386 Backing store access coordination in a multi-processor system |
01/23/1979 | US4136385 Synonym control means for multiple virtual storage systems |
01/16/1979 | US4135242 Method and processor having bit-addressable scratch pad memory |
01/02/1979 | US4133041 Data processing control apparatus with selective data readout |
12/26/1978 | US4131942 Non-volatile storage module for a controller |
12/26/1978 | US4131940 Channel data buffer apparatus for a digital data processing system |
12/19/1978 | US4130880 Data storage system for addressing data stored in adjacent word locations |
12/19/1978 | US4130870 Hierarchially arranged memory system for a data processing arrangement having virtual addressing |
12/19/1978 | US4130868 Independently controllable multiple address registers for a data processor |
12/19/1978 | US4130864 Priority selection circuit for multiported central functional unit with automatic priority reduction on excessive port request |
12/19/1978 | CA1044813A1 Peripheral device reassignment control technique |
12/19/1978 | CA1044801A1 Pre-recorded digital data compensation system |
12/05/1978 | US4128882 Packet memory system with hierarchical structure |
12/05/1978 | US4128881 Shared memory access control system for a multiprocessor system |
12/05/1978 | US4128875 Optional virtual memory system |
12/05/1978 | US4128874 Method and apparatus for preventing erroneous data transfer from a digital computer |