| Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248) | 
|---|
| 10/22/1991 | US5059920 CMOS amplifier with offset adaptation | 
| 10/22/1991 | US5059831 Buffer circuit with an electrostatic protector | 
| 10/22/1991 | US5059821 Bi-CMOS driver with two CMOS predrivers having different switching thresholds | 
| 10/22/1991 | US5059819 Integrated logic circuit | 
| 10/22/1991 | US5059815 High voltage charge pumps with series capacitors | 
| 10/22/1991 | US5059809 Light-responsive device for a photoelectric switch | 
| 10/22/1991 | US5059782 Multi-function detection circuit for a photoelectric switch using an integrated circuit with reduced interconnections | 
| 10/22/1991 | US5059555 Method to fabricate vertical fuse devices and Schottky diodes using thin sacrificial layer | 
| 10/22/1991 | US5059549 Method of manufacturing a bi-mos device with a polycrystalline resistor | 
| 10/22/1991 | US5059547 Single crystal silicon substrate, overcoating of silicon oxide | 
| 10/22/1991 | US5059475 Apparatus and method of forming optical waveguides on metalized substrates | 
| 10/22/1991 | US5059254 Solar cell substrate and solar panel for automobile | 
| 10/22/1991 | US5058250 Manufacture of electrical transducer devices, particularly infrared detector arrays | 
| 10/22/1991 | CA1291214C Clock monitor for use with vlsi chips | 
| 10/17/1991 | WO1991015875A1 Two phase ccd for interline image sensor | 
| 10/17/1991 | WO1991015874A1 Cold cathode field emission device having integral control or controlled non-fed devices | 
| 10/17/1991 | WO1991015853A1 Very high density wafer scale device architecture | 
| 10/17/1991 | WO1991015852A1 Dynamic ram in which timing of end of data read out is earlier than conventional | 
| 10/17/1991 | DE4112072A1 Metal insulated semiconductor transistor - has offset zone partially overlapped by double offset zone of opposite type | 
| 10/17/1991 | DE4107165A1 Single transistor semiconductor memory cell - includes capacitor with ferroelectric layer between opposing electrodes | 
| 10/16/1991 | EP0452091A2 Electrically programmable antifuse element and method of forming it | 
| 10/16/1991 | EP0452090A2 Method of forming an antifuse element with substantially reduced capacitance | 
| 10/16/1991 | EP0452035A1 Semiconductor variable capacitance diode | 
| 10/16/1991 | EP0451993A2 Method for preparing a substrate for semiconductor devices | 
| 10/16/1991 | EP0451973A2 A transistor logical circuit | 
| 10/16/1991 | EP0451904A1 A semiconductor device | 
| 10/16/1991 | EP0451883A1 Process for the accomplishment of an ROM memory cell having a low drain capacity | 
| 10/16/1991 | EP0451870A2 Reference voltage generating circuit | 
| 10/16/1991 | EP0451856A1 Solid-state image sensing device | 
| 10/16/1991 | EP0451632A2 Semiconductor structure and method of its manufacture | 
| 10/16/1991 | EP0451595A2 Short circuit detector circuit for memory array | 
| 10/16/1991 | EP0451454A2 Semiconductor device having element regions being electrically isolated from each other | 
| 10/16/1991 | EP0451423A1 Vertical isolated-collector PNP transistor structure | 
| 10/16/1991 | EP0451286A1 Integrated circuit device | 
| 10/16/1991 | CN1055436A Integrated circuit for analog system | 
| 10/16/1991 | CN1014381B Large area fransducer array electrostatic disckarge protection circuit | 
| 10/16/1991 | CN1014359B Test method for lcd elements | 
| 10/15/1991 | US5058058 Structure for sense amplifier arrangement in semiconductor memory device | 
| 10/15/1991 | US5057926 Driving method for discharging overflow charges in a solid state imaging device | 
| 10/15/1991 | US5057898 Double-gated semiconductor memory device | 
| 10/15/1991 | US5057897 Charge neutralization using silicon-enriched oxide layer | 
| 10/15/1991 | US5057896 Semiconductor device and method of producing same | 
| 10/15/1991 | US5057894 Semiconductor integrated circuit device | 
| 10/15/1991 | US5057893 Static RAM cell with soft error immunity | 
| 10/15/1991 | US5057889 Electronic device including thin film transistor | 
| 10/15/1991 | US5057888 Double DRAM cell | 
| 10/15/1991 | US5057887 High density dynamic ram cell | 
| 10/15/1991 | US5057885 Memory cell system with first and second gates | 
| 10/15/1991 | US5057796 Digital frequency modulation system in which high and low frequency portions are processed separately | 
| 10/15/1991 | US5057721 Level shift circuit for controlling a driving circuit | 
| 10/15/1991 | US5057720 Output buffering H-bridge circuit | 
| 10/15/1991 | US5057714 BiCMOS integrated circuit device utilizing Schottky diodes | 
| 10/15/1991 | US5057704 Semiconductor integrated circuit having substrate potential detecting circuit commonly used | 
| 10/15/1991 | US5057455 Formation of integrated circuit electrodes | 
| 10/15/1991 | US5057451 Isotropic etching of thikc oxide under masking later | 
| 10/15/1991 | US5057450 Method for fabricating silicon-on-insulator structures | 
| 10/15/1991 | US5057448 Method of making a semiconductor device having DRAM cells and floating gate memory cells | 
| 10/15/1991 | US5057447 Silicide/metal floating gate process | 
| 10/15/1991 | US5057445 Method of making a high-voltage, low on-resistance igfet | 
| 10/15/1991 | US5056894 Switching unit for a display device and display device including such a switching unit | 
| 10/10/1991 | DE4039524A1 Substrate bias generator arrangement - has dual generators for run=up of power and stable supply states | 
| 10/09/1991 | EP0451047A1 Environmentally protected integrated optical component and method of manufacturing the same | 
| 10/09/1991 | EP0450985A2 Diamond thin film transistor | 
| 10/09/1991 | EP0450948A2 High density interconnect structure with top mounted components | 
| 10/09/1991 | EP0450941A2 An active matrix display device | 
| 10/09/1991 | EP0450921A2 Information transfer method, information transfer apparatus, and its driving method | 
| 10/09/1991 | EP0450871A2 Interfaces for transmission lines | 
| 10/09/1991 | EP0450866A2 Semiconductor capacitor circuit | 
| 10/09/1991 | EP0450863A2 Integrated circuit for analog system | 
| 10/09/1991 | EP0450829A1 Intelligent programmable sensor | 
| 10/09/1991 | EP0450827A1 Silicon photodiode for monolithic integrated circuits and method for making same | 
| 10/09/1991 | EP0450797A1 Charge pump apparatus | 
| 10/09/1991 | EP0450719A1 Method of manufacturing a charge-coupled image sensor arrangement, and image sensor arrangement obtained by this method | 
| 10/09/1991 | EP0450648A1 Semiconductor device whose output characteristic can be adjusted by functional trimming | 
| 10/09/1991 | EP0450614A1 Semiconductor device containing bipolar transistors | 
| 10/09/1991 | EP0450503A2 Semiconductor devices with borosilicate glass sidewall spacers and method of fabrication | 
| 10/09/1991 | EP0450496A1 Infrared sensor | 
| 10/09/1991 | EP0450468A1 Photovoltaic device and process for manufacturing the same | 
| 10/09/1991 | EP0450389A2 A low-capacitance, high breakdown voltage programmed cell structure for read-only memory circuits | 
| 10/09/1991 | EP0450376A1 BiCMOS device having closely-spaced contacts and method of fabrication | 
| 10/09/1991 | EP0450375A1 Interconnect and method of manufacture for semiconductor devices | 
| 10/09/1991 | EP0450306A1 High-speed diode and method for producing the same | 
| 10/09/1991 | EP0450283A1 SOI layout for low resistance gate | 
| 10/09/1991 | EP0450228A2 Semiconductor device formed on a silicon substrate or a silicon layer and methods of making the same | 
| 10/09/1991 | EP0450027A1 Method and device for compensating drift in a semiconductor element | 
| 10/09/1991 | EP0449858A1 High-voltage transistor arrangement produced by cmos technology. | 
| 10/08/1991 | US5056061 Circuit for encoding identification information on circuit dice using fet capacitors | 
| 10/08/1991 | US5055966 Via capacitors within multi-layer, 3 dimensional structures/substrates | 
| 10/08/1991 | US5055931 Image sensor with high storage capacity per pixel | 
| 10/08/1991 | US5055930 Image sensing and recording device having a multilayer analog memory stacked on an image sensing array | 
| 10/08/1991 | US5055921 Color reading line sensor | 
| 10/08/1991 | US5055905 Semiconductor device | 
| 10/08/1991 | US5055904 Semiconductor device | 
| 10/08/1991 | US5055903 Circuit for reducing the latch-up sensitivity of a cmos circuit | 
| 10/08/1991 | US5055900 Trench-defined charge-coupled device | 
| 10/08/1991 | US5055899 Thin film transistor | 
| 10/08/1991 | US5055898 DRAM memory cell having a horizontal SOI transfer device disposed over a buried storage node and fabrication methods therefor | 
| 10/08/1991 | US5055897 Semiconductor cell for neural network and the like | 
| 10/08/1991 | US5055894 Monolithic interleaved LED/PIN photodetector array | 
| 10/08/1991 | US5055893 Light-emitting diode array with reflective layer |