| Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248) |
|---|
| 06/14/1994 | US5321306 Method for manufacturing a semiconductor device |
| 06/14/1994 | US5321297 Solid state image pickup device having light conversion lens formed on a strip layer |
| 06/14/1994 | US5321294 Shift register having optically bistable elements coupled by an optical waveguide layer |
| 06/14/1994 | US5321293 Integrated device having MOS transistors which enable positive and negative voltage swings |
| 06/14/1994 | US5321292 Voltage limiting device having improved gate-aided breakdown |
| 06/14/1994 | US5321290 Thermal imaging devices |
| 06/14/1994 | US5321287 Semiconductor device wherein n-channel MOSFET, p-channel MOSFET and nonvolatile memory cell are formed in one chip |
| 06/14/1994 | US5321286 Non-volatile semiconductor memory device having thin film memory transistors stacked over associated selecting transistors |
| 06/14/1994 | US5321285 Carrier injection dynamic random access memory having stacked depletion region in Mesa |
| 06/14/1994 | US5321282 Integrated circuit having a charge coupled device and MOS transistor and method for manufacturing thereof |
| 06/14/1994 | US5321280 Composite semiconductor integrated circuit device |
| 06/14/1994 | US5321250 Solid state image pickup device with optical filter free from age deterioration |
| 06/14/1994 | US5321249 Solid-state imaging device and method of manufacturing the same |
| 06/14/1994 | US5321204 Structure of charged coupled device |
| 06/14/1994 | US5320976 Transistors of cell array section are formed independently from transistol of peripheral circuit section |
| 06/14/1994 | US5320975 Doping substrate forming isolation region, delineating polysilicon lands, forming well regions on substrate, forming insulator encapsulated conductive polysilicon stud, forming self-aligned source and drain regions and contact region |
| 06/14/1994 | US5320972 Method of forming a bipolar transistor |
| 06/14/1994 | US5320971 Process for obtaining high barrier Schottky diode and local interconnect |
| 06/14/1994 | US5320705 Electrical isolation |
| 06/09/1994 | WO1994013121A1 Module comprising ic memory stack dedicated to and structurally combined with an ic microprocessor |
| 06/09/1994 | WO1994013021A1 Ferroelectric material based microsensor array and process for the production thereof |
| 06/09/1994 | WO1994013009A1 Transistor fabrication methods and methods of forming multiple layers of photoresist |
| 06/09/1994 | WO1994012238A1 Implantable medical device with magnetically actuated switch |
| 06/09/1994 | WO1994005455A3 Modulated-structure of pzt/pt ferroelectric thin films for non-volatile random access memories |
| 06/09/1994 | DE4340590A1 Grabenisolation unter Verwendung dotierter Seitenwände Grave insulation using doped side walls |
| 06/09/1994 | CA2149538A1 Transistor fabrication methods and methods of forming multiple layers of photoresist |
| 06/08/1994 | EP0600850A1 DRAM cell structure with capacitor over bit line and method of making the same |
| 06/08/1994 | EP0600810A1 Ovenvoltage protection device |
| 06/08/1994 | EP0600750A2 Circuit assembly having interposer lead frame |
| 06/08/1994 | EP0600692A2 Virtual ground read only memory circuit |
| 06/08/1994 | EP0600488A2 Lead frame capacitor and capacitively-coupled isolator circuit using same |
| 06/08/1994 | EP0600449A2 Fabrication method of compound semiconductor integrated circuit device |
| 06/08/1994 | EP0600229A1 Power semiconductor device with protective means |
| 06/08/1994 | EP0600184A2 Semiconductor memory device having dual word line structure |
| 06/08/1994 | EP0600160A2 Semiconductor memory device with a test mode |
| 06/08/1994 | EP0600063A1 Method of manufacturing cmos semiconductor components with local interconnects. |
| 06/08/1994 | EP0231265B1 Image sensor having normalized areal conductive elements to effect uniform capacitative loading |
| 06/07/1994 | US5319725 Bilithic composite for optoelectronic integration |
| 06/07/1994 | US5319605 Arrangement of word line driver stage for semiconductor memory device |
| 06/07/1994 | US5319601 Power supply start up circuit for dynamic random access memory |
| 06/07/1994 | US5319600 Semiconductor memory device with noise immunity |
| 06/07/1994 | US5319594 Semiconductor memory device including nonvolatile memory cells, enhancement type load transistors, and peripheral circuits having enhancement type transistors |
| 06/07/1994 | US5319593 Memory array with field oxide islands eliminated and method |
| 06/07/1994 | US5319319 Low drift resistor structure for amplifiers |
| 06/07/1994 | US5319318 Gain control circuit and semiconductor device |
| 06/07/1994 | US5319262 Low power TTL/CMOS receiver circuit |
| 06/07/1994 | US5319240 Three dimensional integrated device and circuit structures |
| 06/07/1994 | US5319236 Semiconductor device equipped with a high-voltage MISFET |
| 06/07/1994 | US5319235 Monolithic IC formed of a CCD, CMOS and a bipolar element |
| 06/07/1994 | US5319234 C-BiCMOS semiconductor device |
| 06/07/1994 | US5319228 Semiconductor memory device with trench-type capacitor |
| 06/07/1994 | US5319225 Output terminal of a solid-state image device |
| 06/07/1994 | US5319224 Integrated circuit device having a geometry to enhance fabrication and testing and manufacturing method thereof |
| 06/07/1994 | US5319206 Method and apparatus for acquiring an X-ray image using a solid state device |
| 06/07/1994 | US5319182 Optical information detecting apparatus |
| 06/07/1994 | US5319158 Coil integrated semi-conductor device and method of making the same |
| 06/07/1994 | US5318925 Method of manufacturing a self-aligned interlayer contact in a semiconductor device |
| 06/07/1994 | US5318920 Method for manufacturing a capacitor having a rough electrode surface |
| 06/07/1994 | US5318666 Forming n-p junction; dry reactive etching to form via |
| 06/07/1994 | US5318663 Providing ultra-thin silicon on insulator films having self-aligned isolation regions between active device regions |
| 06/07/1994 | CA1330105C Electrostatic discharge protection circuit for an integrated circuit |
| 06/05/1994 | CA2110632A1 Overvoltage protection circuit |
| 06/01/1994 | EP0599761A1 A method of forming uniformly thin, isolated silicon mesas on an insulating substrate |
| 06/01/1994 | EP0599745A1 Protection structure against overvoltages for a vertical semiconductor device |
| 06/01/1994 | EP0599739A1 Thyristor and assembly of thyristors with common cathode |
| 06/01/1994 | EP0599555A2 SRAM cell with balanced load resistors |
| 06/01/1994 | EP0599506A1 Semiconductor memory cell with SOI MOSFET |
| 06/01/1994 | EP0599469A2 Method and device for designing layout of milliwave or microwave integrated circuit |
| 06/01/1994 | EP0599318A2 Method for manufacturing semiconductor device having groove-structured isolation |
| 06/01/1994 | EP0599275A1 Semiconductor integrated circuit having delay circuit with voltage-to-delay characteristics proportional to power voltage level |
| 06/01/1994 | EP0599221A1 IGBT with bipolar transistor |
| 06/01/1994 | EP0598974A2 Semiconductor integrated circuit |
| 06/01/1994 | EP0598895A1 Symmetrical multi-layer metal logic array with continuous substrate taps |
| 06/01/1994 | EP0598861A1 Method of fabrication optoelectronic components |
| 06/01/1994 | EP0598855A1 Optically controlled semiconductor laser. |
| 06/01/1994 | EP0396553B1 Integrated circuit with anti ''latch-up'' circuit obtained using complementary mos circuit technology |
| 06/01/1994 | EP0391923B1 Integrated circuit with anti-''latch-up'' circuit obtained using complementary mos circuit technology |
| 06/01/1994 | DE4340419A1 Mfg. semiconductor component with first film on substrate - includes forming etching mask with aperture on films, leaving part of film free |
| 06/01/1994 | DE4340405A1 Semiconductor module mfr. including insulating layer - obtd. by implanting dopant in region of semiconductor substrate through insulating layer |
| 05/31/1994 | US5317698 FPGA architecture including direct logic function circuit to I/O interconnections |
| 05/31/1994 | US5317586 Buried layer III-V semiconductor devices with impurity induced layer disordering |
| 05/31/1994 | US5317534 A mask read only memory device |
| 05/31/1994 | US5317532 Semiconductor memory device having voltage stress testing capability |
| 05/31/1994 | US5317436 A slide assembly for projector with active matrix moveably mounted to housing |
| 05/31/1994 | US5317432 Liquid crystal display device with a capacitor and a thin film transistor in a trench for each pixel |
| 05/31/1994 | US5317423 Image sensing apparatus using calibration sequences stored in extended portions of shift registers |
| 05/31/1994 | US5317408 Horizontally aligned image pickup for CCD image sensor |
| 05/31/1994 | US5317406 Image reading device and image information processing apparatus utilizing the same |
| 05/31/1994 | US5317282 Tetrode biasing circuit |
| 05/31/1994 | US5317236 Single crystal silicon arrayed devices for display panels |
| 05/31/1994 | US5317208 Integrated circuit employing inverse transistors |
| 05/31/1994 | US5317183 Substrate noise coupling reduction for VLSI applications with mixed analog and digital circuitry |
| 05/31/1994 | US5317182 Termination of the power stage of a monolithic semiconductor device |
| 05/31/1994 | US5317180 Vertical DMOS transistor built in an n-well MOS-based BiCMOS process |
| 05/31/1994 | US5317179 Non-volatile semiconductor memory cell |
| 05/31/1994 | US5317178 Offset dual gate thin film field effect transistor |
| 05/31/1994 | US5317177 Semiconductor device and method of manufacturing the same |
| 05/31/1994 | US5317175 CMOS device with perpendicular channel current directions |
| 05/31/1994 | US5317174 Bulk charge modulated device photocell |
| 05/31/1994 | US5317173 HBT differential pair chip for quasi-optic amplifiers |