Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
03/1994
03/01/1994US5290727 Method for suppressing charge loss in EEPROMs/EPROMS and instabilities in SRAM load resistors
03/01/1994US5290726 DRAM cells having stacked capacitors of fin structures and method of making thereof
03/01/1994US5290725 Semiconductor memory device and a method for producing the same
03/01/1994US5290724 Method of forming an electrostatic discharge protection circuit
03/01/1994US5290723 Method of manufacturing a nonvolatile semiconductor memory
03/01/1994US5290722 Method of making floating gate junction field effect transistor image sensor elements
03/01/1994US5290721 Depositing gate oxide film, electroconductive layer as float-ing gate, patterning, oxidation, forming second electrocon-ductive layer, etching
03/01/1994US5290720 Transistor with inverse silicide T-gate structure
03/01/1994US5290719 Method of making complementary heterostructure field effect transistors
03/01/1994US5290716 Method of manufacturing semiconductor devices
03/01/1994US5290714 Method of forming semiconductor device including a CMOS structure having double-doped channel regions
03/01/1994US5290713 Process of manufacturing a semiconductor device by using a photoresist mask which does not encircle an area of implanted ions
03/01/1994US5290609 Method of forming dielectric film for semiconductor devices
03/01/1994US5290367 First region of semiconductor with light-receiving surface, second region on at least one part of light receiver to form photovoltaic mechanism, barrier layer, transparent conductive film contacting second region and barrier, bias voltage
02/1994
02/24/1994DE4328111A1 Prodn. of mask ROMs - by forming gate oxide film, gate electrode, and source and drain regions on semiconductor substrate
02/24/1994DE4327660A1 Configurable integrated circuit mfg. device, e.g. for field programmable gate array - uses logic function determination data to load required logic function configuration via data input terminals
02/23/1994EP0583625A2 Method of increasing the layout efficiency of dies on a wafer, and increasing the ratio of I/O area to active area per die
02/23/1994EP0583585A2 Individually powering-up unsingulated dies on a wafer
02/22/1994US5289477 Personal computer wherein ECC and partly error checking can be selectively chosen for memory elements installed in the system, memory elements enabling selective choice of error checking, and method
02/22/1994US5289431 Semiconductor memory device divided into blocks and operable to read and write data through different data lines and operation method of the same
02/22/1994US5289423 Bank erasable, flash-EPROM memory
02/22/1994US5289422 Semiconductor device having dummy wiring pattern therein and manufacturing method thereof
02/22/1994US5289421 Dynamic random access memory with low noise characteristics
02/22/1994US5289416 Semiconductor integrated device and wiring correction arrangement therefor
02/22/1994US5289411 Floating gate memory array device having improved immunity to write disturbance
02/22/1994US5289405 Semiconductor memory circuit device having memory cells constructed on a Bicmos gate array
02/22/1994US5289384 Device simulator for semiconductor device
02/22/1994US5289334 CMOS on-chip ESD protection circuit and semiconductor structure
02/22/1994US5289174 Liquid crystal display device
02/22/1994US5289043 Switching system for selectively enabling electrical power to be applied to plural loads
02/22/1994US5289040 Compensating lead structure for distributed IC components
02/22/1994US5289037 Conductor track configuration for very large-scale integrated circuits
02/22/1994US5289030 Semiconductor device with oxide layer
02/22/1994US5289029 Semiconductor integrated circuit device having wells biased with different voltage levels
02/22/1994US5289028 High power semiconductor device with integral on-state voltage detection structure
02/22/1994US5289026 Array of electrically erasable non-volatile memory devices
02/22/1994US5289025 Integrated circuit having a boosted node
02/22/1994US5289023 High-density photosensor and contactless imaging array having wide dynamic range
02/22/1994US5289022 CCD shift register having a plurality of storage regions and transfer regions therein
02/22/1994US5289021 Basic cell architecture for mask programmable gate array with 3 or more size transistors
02/22/1994US5289017 Solid state imaging device having silicon carbide crystal layer
02/22/1994US5289016 Borosilicate glass and silicon nitride passivatin film covers amorphous silicon film; excellent stability
02/22/1994US5289015 Planar fet-seed integrated circuits
02/22/1994US5288988 Photoconversion device having reset control circuitry
02/22/1994US5288951 Copper-based metallizations for hybrid integrated circuits
02/22/1994US5288659 Photonic-integrated-circuit fabrication process
02/22/1994US5288656 Lamination of silicon oxide and nitride dielectric layers, making polycrystalline silicone electrode, doping, heat treatment
02/22/1994US5288655 Method of making dynamic random access memory having a reliable contact
02/22/1994US5288651 Depositing doped polysilicon and high melting composite connective layers, selective patterning to form emitter electrode
02/22/1994US5288649 Depositing titanium absorber layer, temperature variable resistor layer
02/22/1994CA2021585C Integrated mos circuit with adjustable voltage level
02/22/1994CA2008626C Integrated circuit safety device
02/17/1994WO1994003929A1 Semiconductor device
02/17/1994WO1994003928A1 High voltage protection using scrs
02/17/1994WO1994003908A1 Cubic metal oxide thin film epitaxially grown on silicon
02/17/1994WO1994003901A1 Fault-tolerant, high-speed bus system and bus interface for wafer-scale integration
02/17/1994WO1994003899A1 Nonvolatile random access memory
02/17/1994WO1994003898A1 Dram cell assembly
02/17/1994WO1993018428A3 Head-mounted display system
02/17/1994CA2141566A1 Cubic metal oxide thin film epitaxially grown on silicon
02/16/1994EP0583163A2 Semiconductor memory device
02/16/1994EP0583105A1 ESD protection using NPN bipolar transistor
02/16/1994EP0583037A1 A semiconductor protection component
02/16/1994EP0583028A1 A semiconductor device comprising a vertical insulated gate field effect device and a method of manufacturing such a device
02/16/1994EP0583008A2 Semiconductor integrated circuit device and method of manufacturing the same
02/16/1994EP0582767A1 Latch-up immune CMOS output driver
02/16/1994EP0582710A1 Electrically programmable memory cell
02/16/1994EP0582587A1 Vertical metallically loaded polarization splitter and polarization-diversified optical receiver.
02/16/1994EP0335965B1 Phantom esd protection circuit employing e-field crowding
02/16/1994CN1082254A 半导体器件 Semiconductor devices
02/15/1994US5287376 Independently addressable semiconductor diode lasers with integral lowloss passive waveguides
02/15/1994US5287361 Process for extending the operating period of a circuit with MOS components exposed to gamma radiation
02/15/1994US5287320 Timing coinciding circuit simultaneously supplying two power supply voltages applied in different timing
02/15/1994US5287319 Nonvolatile semiconductor memory device
02/15/1994US5287318 Semiconductor memory
02/15/1994US5287312 Dynamic random access memory
02/15/1994US5287308 Undershoot resisting input circuit for semi-conductor device
02/15/1994US5287304 Memory cell circuit and array
02/15/1994US5287303 SCR type memory apparatus
02/15/1994US5287292 Heat regulator for integrated circuits
02/15/1994US5287241 Shunt circuit for electrostatic discharge protection
02/15/1994US5287047 Motor drive circuit and motor drive system using the same
02/15/1994US5287012 Semiconductor integrated circuit equipped with diagnostic circuit for checking reference voltage signal supplied to internal step-down circuit
02/15/1994US5286998 Semiconductor device having two transistors forming a memory cell and a peripheral circuit, wherein the impurity region of the first transistor is not subjected to an etching atmosphere
02/15/1994US5286992 Low voltage device in a high voltage substrate
02/15/1994US5286991 Capacitor for a BiCMOS device
02/15/1994US5286990 Top buss virtual phase frame interline transfer CCD image sensor
02/15/1994US5286989 Solid state imaging device
02/15/1994US5286988 Charge coupled device image sensor
02/15/1994US5286987 Charge transfer device
02/15/1994US5286986 Semiconductor device having CCD and its peripheral bipolar transistors
02/15/1994US5286985 Interface circuit operable to perform level shifting between a first type of device and a second type of device
02/15/1994US5286983 Thin-film-transistor array with capacitance conductors
02/15/1994US5286976 Microstructure design for high IR sensitivity
02/15/1994US5286673 Method for forming position alignment marks in a manufacturing SOI device
02/15/1994US5286670 Method of manufacturing a semiconductor device having buried elements with electrical characteristic
02/15/1994US5286669 Solid-state imaging device and method of manufacturing the same
02/15/1994US5286668 Layers of doped and undoped polysilicon, dielectric layer and top electrode layer; etching with phosphoric acid
02/15/1994US5286667 Modified and robust self-aligning contact process
02/15/1994US5286666 Method of producing semiconductor memory device