Patents
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
08/1994
08/30/1994US5343065 Method of controlling surge protection device hold current
08/30/1994US5343064 Fully integrated single-crystal silicon-on-insulator process, sensors and circuits
08/30/1994US5343063 Dense vertical programmable read only memory cell structure and processes for making them
08/30/1994US5343062 Semiconductor memory having a memory cell including a capacitor with a two-layer lower electrode
08/30/1994US5343061 Solid-state imaging device suppressing dark-current noise
08/30/1994US5343060 Apparatus for reducing mirror in a solid state imaging device wherein a light intercepting layer shields a transfer means from instant light and has an edge which slopes toward the light sensing region
08/30/1994US5343059 Method and apparatus for reducing blooming in output of a CCD image sensor
08/30/1994US5343058 Gate array bases with flexible routing
08/30/1994US5343053 SCR electrostatic discharge protection for integrated circuits
08/30/1994US5342958 Insecticides
08/30/1994US5342803 Implanting ions of impurity to prevent inversion of the conductive type of the substrate just under field insulator film to form channel stop region
08/30/1994US5342802 Method of manufacturing a complementary MIS transistor
08/30/1994US5342801 Controllable isotropic plasma etching technique for the suppression of stringers in memory cells
08/30/1994US5342800 Method of making memory cell capacitor
08/30/1994US5342799 Substrate slew circuit process
08/30/1994US5342798 Doping integrated circuit to form source and drain region, heating to form oxide layer, depositing metal layer over oxide, annealing to form metal-silicide. stripping unreacted metal
08/30/1994US5342794 Method for forming laterally graded deposit-type emitter for bipolar transistor
08/30/1994US5342480 Isolating active regions that are buried in grooves formed in non-active regions
08/30/1994US5342451 Converts optical power into electrical power
08/25/1994DE4405815A1 Semiconductor device having an anode layer which has low-concentration regions formed by selective diffusion
08/25/1994DE4405482A1 Semiconductor component
08/25/1994DE4405250A1 Halbleiter-Bauelement und Verfahren zu seiner Herstellung Semiconductor device and process for its preparation
08/25/1994DE4314913C1 Method for producing a semiconductor component having a contact structure for vertical contact-making with other semiconductor components
08/25/1994DE4314907C1 Method for producing semiconductor components making electrically conducting contact with one another vertically
08/25/1994DE4305038A1 MOSFET with temperature protection
08/24/1994EP0612151A2 Semiconductor device capable of reducing a clock skew in a plurality of wiring pattern blocks
08/24/1994EP0612110A1 High voltage MOS transistor with extended drain
08/24/1994EP0612108A1 Double polysilicon EEPROM cell and corresponding manufacturing process
08/24/1994EP0612107A1 Double polysilicon EEPROM cell and corresponding programming method
08/24/1994EP0612106A1 Electronic device with reduced alpha particles soft error rate
08/24/1994EP0612103A2 Method of manufacturing a silicon-on-insulator semiconductor device
08/24/1994EP0521002B1 Short-circuit resistant transistor final stage, in particular ignition final stage for motor vehicles
08/24/1994EP0374232B1 Method of fabricating an infrared photodetector
08/23/1994US5341444 Polarization compensated integrated optical filters and multiplexers
08/23/1994US5341342 Flash memory cell structure
08/23/1994US5341341 Dynamic random access memory device having addressing section and/or data transferring path arranged in pipeline architecture
08/23/1994US5341339 Method for wear leveling in a flash EEPROM memory
08/23/1994US5341337 Semiconductor read only memory with paralleled selecting transistors for higher speed
08/23/1994US5341328 Electrically erasable memory elements having reduced switching current requirements and increased write/erase cycle life
08/23/1994US5341327 Static random access type semiconductor memory device
08/23/1994US5341326 Semiconductor memory having memory cell units each including cascade-connected MOS transistors
08/23/1994US5341324 Semiconductor device and manufacturing method thereof
08/23/1994US5341114 Integrated limiter and amplifying devices
08/23/1994US5341049 Integrated circuit having alternate rows of logic cells and I/O cells
08/23/1994US5341041 Basic cell for BiCMOS gate array
08/23/1994US5341039 High frequency integrated circuit device including a circuit for decreasing reflected signals in wiring formed on a semiconductor substrate
08/23/1994US5341030 Methods for protecting outputs of low-voltage circuits from high programming voltages
08/23/1994US5341028 Semiconductor device and a method of manufacturing thereof
08/23/1994US5341024 Method of increasing the layout efficiency of dies on a wafer, and increasing the ratio of I/O area to active area per die
08/23/1994US5341023 Novel vertical-gate CMOS compatible lateral bipolar transistor
08/23/1994US5341021 Bipolar transistor having an electrode structure suitable for integration
08/23/1994US5341018 Semiconductor integrated circuit device having a plurality of input circuits each including differently sized transistors
08/23/1994US5341014 Semiconductor device and a method of fabricating the same
08/23/1994US5341013 Semiconductor device provided with sense circuits
08/23/1994US5341012 CMOS device for use in connection with an active matrix panel
08/23/1994US5341010 Semiconductor device including nonvolatile memories
08/23/1994US5341009 Fast charging MOS capacitor structure for high magnitude voltage of either positive or negative polarity
08/23/1994US5341008 Bulk charge modulated device photocell with lateral charge drain
08/23/1994US5341007 Semiconductor device and a method for fabricating the same
08/23/1994US5341005 Structure for protecting an integrated circuit from electrostatic discharges
08/23/1994US5341004 Semiconductor switching device with reduced switching loss
08/23/1994US5341003 MOS semiconductor device having a main unit element and a sense unit element for monitoring the current in the main unit element
08/23/1994US5341000 Thin silicon carbide layer on an insulating layer
08/23/1994US5340998 Semiconductor surface light emitting and receiving heterojunction device
08/23/1994US5340978 Image-sensing display panels with LCD display panel and photosensitive element array
08/23/1994US5340977 Solid-state image pickup device
08/23/1994US5340775 Depositing silicon chromium film on substrate, masking, etching, cleaning, depositing tungsten layer, then aluminum alloy, etching, annealing, depositing silicon dioxide passivation layer
08/23/1994US5340774 Semiconductor fabrication technique using local planarization with self-aligned transistors
08/23/1994US5340772 Method of increasing the layout efficiency of dies on a wafer and increasing the ratio of I/O area to active area per die
08/23/1994US5340770 Method of making a shallow junction by using first and second SOG layers
08/23/1994US5340769 Method for manufacturing semiconductor device having groove-structured isolation
08/23/1994US5340768 Method of fabricating self-aligned field-plate isolation between control electrodes
08/23/1994US5340766 Method for fabricating charge-coupled device
08/23/1994US5340765 Forming planarized layer, forming opening, forming silicon layers in opening, forming oxide layers, partially removing insulating layer and exposing outer surface of container, annealing
08/23/1994US5340764 Integration of high performance submicron CMOS and dual-poly non-volatile memory devices using a third polysilicon layer
08/23/1994US5340763 Multi-pin stacked capacitor utilizing micro villus patterning in a container cell and method to fabricate same
08/23/1994US5340762 Forming islands of silicon, forming insulating layer over gate electrode portion, forming electrodes, doping, masking, heating to form emitter and drain contact regions
08/23/1994US5340760 Method of manufacturing EEPROM memory device
08/23/1994US5340759 Forming source and drain layers, etching, forming gate dielectric layer, forming conductive gate in contact with gate dielectric layer
08/23/1994US5340756 Method for producing self-aligned LDD CMOS, DMOS with deeper source/drain and P-base regions and, bipolar devices on a common substrate
08/23/1994US5340754 Method for forming a transistor having a dynamic connection between a substrate and a channel region
08/23/1994US5340435 Bonded wafer and method of manufacturing it
08/23/1994CA2015462C Light emitting diode array
08/23/1994CA2015358C Light emitting diode array
08/20/1994CA2115944A1 Semiconductor device and a manufacturing method therefor
08/18/1994WO1994018736A1 Overcurrent protective circuit and semiconductor device
08/18/1994WO1994018706A1 Active matrix substrate and thin film transistor, and method of its manufacture
08/18/1994WO1994018704A1 Optical character generator for an electrographic printer
08/18/1994WO1994018703A1 Ultra-high-density alternate metal virtual ground rom
08/18/1994WO1994018702A1 A thin film semiconductor device and method
08/18/1994WO1994018677A1 Improvements in a very large scale integrated planar read only memory
08/18/1994DE4404129A1 Conducting structure prodn. on topography of substrate
08/18/1994DE4341698A1 Semiconductor component and method for its production
08/17/1994EP0610969A2 Active matrix panel
08/17/1994EP0610949A2 Static semiconductor memory device having increased soft error immunity
08/17/1994EP0610927A2 SRAM memory structure and manufacturing method thereof
08/17/1994EP0610922A2 Semiconductor memory device
08/17/1994EP0610771A1 Semiconductor arrangement with CMOS basic cells
08/17/1994EP0610709A1 Process of manufacturing tri-dimensional circuit devices
08/17/1994EP0610643A1 EEPROM cell and peripheral MOS transistor