Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248) |
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01/16/2001 | US6175131 Semiconductor device having a capacitor and an interconnect layer |
01/16/2001 | US6175130 DRAM having a cup-shaped storage node electrode recessed within a semiconductor substrate |
01/16/2001 | US6175129 Capacitor structures, DRAM cell structures, methods of forming capacitors, methods of forming DRAM cells, and integrated circuits incorporating capacitor structures and DRAM cell structures |
01/16/2001 | US6175128 Process for building borderless bitline, wordline and DRAM structure and resulting structure |
01/16/2001 | US6175127 Stack capacitor having a diffusion barrier |
01/16/2001 | US6175126 Asymmetrically split charged coupled device |
01/16/2001 | US6174824 Post-processing a completed semiconductor device |
01/16/2001 | US6174817 Two step oxide removal for memory cells |
01/16/2001 | US6174779 Method for manufacturing a lateral bipolar transistor |
01/16/2001 | US6174774 Method of fabricating semiconductor device |
01/16/2001 | US6174771 Split gate flash memory cell with self-aligned process |
01/16/2001 | US6174768 Dynamic random access memory cell having an improved fin-structured storage electrode and method of fabricating the same |
01/16/2001 | US6174767 Method of fabrication of capacitor and bit-line at same level for 8F2 DRAM cell with minimum bit-line coupling noise |
01/16/2001 | US6174766 Semiconductor device and method of manufacturing the semiconductor device |
01/16/2001 | US6174764 Process for manufacturing integrated circuit SRAM |
01/16/2001 | US6174763 Three-dimensional SRAM trench structure and fabrication method therefor |
01/16/2001 | US6174759 Method of manufacturing a semiconductor device |
01/16/2001 | US6174756 Spacers to block deep junction implants and silicide formation in integrated circuits |
01/16/2001 | US6174747 Method of fabricating ridge waveguide semiconductor light-emitting device |
01/16/2001 | US6174742 Off-grid metal layer utilization |
01/16/2001 | US6174737 Magnetic random access memory and fabricating method thereof |
01/16/2001 | US6174736 Method of fabricating ferromagnetic tunnel junction device |
01/16/2001 | US6174613 Constructed on a pre-constructed substrate that includes a flexible base layer having a conducting surface on one side thereof; base layer is impermeable to oxygen and water |
01/16/2001 | US6174564 Used to form metal oxides for use in integrated circuits, by mixing in a c7-10 alkane solvent and reacting a metal alkoxide with a metal carboxylate to form a mixed metal alkoxycarboxylate of given formula |
01/11/2001 | WO2001003418A1 Image detector |
01/11/2001 | WO2001003302A1 Capacitor array |
01/11/2001 | WO2001003301A1 High voltage protection circuit on standard cmos process |
01/11/2001 | WO2001003208A1 Nanoscopic wire-based devices, arrays, and methods of their manufacture |
01/11/2001 | WO2001003207A1 A monolithic semiconductor detector |
01/11/2001 | WO2001003205A1 Indirect back surface contact to semiconductor devices |
01/11/2001 | WO2001003203A1 Non-volatile semiconductor memory cell, comprising a separate tunnel window and a method for producing the same |
01/11/2001 | WO2001003198A1 Memory cell arrangement |
01/11/2001 | WO2001003191A1 Soi substrate, method of manufacture thereof, and semiconductor device using soi substrate |
01/11/2001 | WO2001003190A1 Semiconductor integrated circuit device |
01/11/2001 | WO2001003172A1 Method for producing a thin membrane and resulting structure with membrane |
01/11/2001 | WO2001003171A1 Method for making a thin film using pressurisation |
01/11/2001 | WO2001003126A2 High density non-volatile memory device |
01/11/2001 | DE19930586A1 Nichtflüchtige Halbleiter-Speicherzelle mit separatem Tunnelfenster und dazugehöriges Herstellungsverfahren Non-volatile semiconductor memory cell with a separate tunnel window and associated manufacturing processes |
01/11/2001 | DE19929618A1 Verfahren zur Herstellung einer nichtflüchtigen Halbleiter-Speicherzelle mit separatem Tunnelfenster A method of manufacturing a nonvolatile semiconductor memory cell with a separate tunnel window |
01/11/2001 | DE19928563A1 MOS transistor used in CMOS circuits comprises a semiconductor island on a main surface of substrate and an annular isolating structure arranged on the island |
01/11/2001 | DE10030308A1 Production of a contact pin of a semiconductor element comprises using a gas mixture containing sulfur hexafluoride, trifluoromethane and carbon tetrafluoride in the back etching of the polysilicon layer |
01/11/2001 | DE10022664A1 Semiconductor memory for computer, has memory cell array with peripheral circuit area and insulating layer formed on peripheral circuit area to alleviate step formed by cylindrical electrode in memory cell |
01/11/2001 | DE10000451A1 Clock signal analyzer has three memories, pre-processor, simulation device, post-processor and display showing a two-dimensional simulation map |
01/11/2001 | CA2377896A1 High voltage protection circuit on standard cmos process |
01/11/2001 | CA2372707A1 Nanoscopic wire-based devices, arrays, and method of their manufacture |
01/10/2001 | EP1067606A2 Radiation detector |
01/10/2001 | EP1067605A1 Ferroelectric memory cell and corresponding manufacturing method |
01/10/2001 | EP1067604A2 Semiconductor apparatus with self-security function |
01/10/2001 | EP1067600A1 CMOS compatible SOI process |
01/10/2001 | EP1067599A1 A method of forming structures with buried oxide regions in a semiconductor substrate |
01/10/2001 | EP1067597A2 Transitors with low overlap capacitance |
01/10/2001 | EP1067595A2 Liquid precursor mixtures for deposition of multicomponent metal containing materials |
01/10/2001 | EP1067557A1 Flash compatible EEPROM |
01/10/2001 | EP1066738A1 Electroluminescent display screen for displaying fixed and segmented patterns, and method of manufacturing such an electroluminescent display screen |
01/10/2001 | EP1066651A2 Improved layout technique for a matching capacitor array using a continuous upper electrode |
01/10/2001 | EP1066555A1 Integration of security modules on an integrated circuit |
01/10/2001 | EP0864171B1 Forming contacts on semiconductor substrates for radiation detectors and imaging devices |
01/10/2001 | CN1279765A Method for detecting current of spin polarized electrons in solid body |
01/10/2001 | CN1279519A Electroluminescent display device and electronic device |
01/10/2001 | CN1279518A Photoelectric display device and electronic device |
01/10/2001 | CN1279517A Twin film field effect transistors and use thereof |
01/10/2001 | CN1279516A Semiconductor device and manufacture thereof |
01/10/2001 | CN1279515A Method for manufacturing photoelectric device |
01/10/2001 | CN1279514A Manufacture of photoelectric device |
01/10/2001 | CN1279513A Capacitors in semiconductor memory and manufacture thereof |
01/10/2001 | CN1279510A Method for forming capacitors in semiconductor memory |
01/10/2001 | CN1279509A Isolating axial ring of nitride lining for improvement of dynamic random memory process |
01/10/2001 | CN1060590C Flash EEPROM cell and method of making the same |
01/10/2001 | CN1060589C Method of making mask ROM |
01/10/2001 | CN1060588C Method for fabricating semiconductor device |
01/09/2001 | US6172934 Semiconductor memory device preventing a malfunction caused by a defective main word line |
01/09/2001 | US6172910 Test cell for analyzing a property of the flash EEPROM cell and method of analyzing a property of the flash EEPROM cell using the same |
01/09/2001 | US6172907 Silicon-oxide-nitride-oxide-semiconductor (SONOS) type memory cell and method for retaining data in the same |
01/09/2001 | US6172905 Method of operating a semiconductor device |
01/09/2001 | US6172904 Magnetic memory cell with symmetric switching characteristics |
01/09/2001 | US6172902 Non-volatile magnetic random access memory |
01/09/2001 | US6172899 Static-random-access-memory cell |
01/09/2001 | US6172898 Semiconductor memory device |
01/09/2001 | US6172897 Semiconductor memory and write and read methods of the same |
01/09/2001 | US6172896 Layout arrangements of fuse boxes for integrated circuit devices, including bent and straight fuses |
01/09/2001 | US6172861 Protection circuit for semiconductor device |
01/09/2001 | US6172547 Semiconductor integrated circuit capable of driving large loads within its internal core area |
01/09/2001 | US6172521 Programmable logic IC having memories for previously storing a plurality of configuration data and a method of reconfigurating same |
01/09/2001 | US6172417 Integrated semiconductor devices |
01/09/2001 | US6172410 Collective substrate of active-matrix substrates, manufacturing method thereof and inspecting method thereof |
01/09/2001 | US6172408 Radiation-sensitive semiconductor device and method of manufacturing same |
01/09/2001 | US6172405 Semiconductor device and production process therefore |
01/09/2001 | US6172404 Tuneable holding voltage SCR ESD protection |
01/09/2001 | US6172403 Electrostatic discharge protection circuit triggered by floating-base transistor |
01/09/2001 | US6172402 Integrated circuit having transistors that include insulative punchthrough regions and method of formation |
01/09/2001 | US6172397 Non-volatile semiconductor memory device |
01/09/2001 | US6172394 Non-volatile semiconductor memory device having a floating gate with protruding conductive side-wall portions |
01/09/2001 | US6172393 Nonvolatile memory having contactless array structure which can reserve sufficient on current, without increasing resistance, even if width of bit line is reduced and creation of hyperfine structure is tried, and method of manufacturing nonvolatile memory |
01/09/2001 | US6172392 Boron doped silicon capacitor plate |
01/09/2001 | US6172391 DRAM cell arrangement and method for the manufacture thereof |
01/09/2001 | US6172390 Semiconductor device with vertical transistor and buried word line |
01/09/2001 | US6172389 Semiconductor memory device having a reduced area for a resistor element |
01/09/2001 | US6172388 Method of fabricating dynamic random access memories |
01/09/2001 | US6172387 Semiconductor interconnection structure and method |
01/09/2001 | US6172386 A capacitor comprising a ferroelectric film formed from a group lead zirconate titanium and lead lanthanum zirconate titanate where having a relatively larger amount of titanium constituent than zinconate constituent |