| Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248) |
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| 03/13/2001 | US6201761 Field effect transistor with controlled body bias |
| 03/13/2001 | US6201749 Semiconductor memory |
| 03/13/2001 | US6201735 Electrically erasable and programmable nonvolatile semiconductor memory |
| 03/13/2001 | US6201733 Semiconductor integrated circuit device, memory module and storage device |
| 03/13/2001 | US6201732 Low voltage single CMOS electrically erasable read-only memory |
| 03/13/2001 | US6201728 Dynamic RAM, semiconductor storage device, and semiconductor integrated circuit device |
| 03/13/2001 | US6201725 Nonvolatile memory cell structure for integration with semiconductor logic devices and method of using same |
| 03/13/2001 | US6201682 Thin-film component |
| 03/13/2001 | US6201617 Image sensing device |
| 03/13/2001 | US6201572 Analog current mode assisted differential to single-ended read-out channel operable with an active pixel sensor |
| 03/13/2001 | US6201466 Magnetoresistor array |
| 03/13/2001 | US6201454 Compensation structure for a bond wire at high frequency operation |
| 03/13/2001 | US6201436 Bias current generating circuits and methods for integrated circuits including bias current generators that increase and decrease with temperature |
| 03/13/2001 | US6201433 Semiconductor memory device having constant voltage circuit |
| 03/13/2001 | US6201411 Programmable integrated circuit having metal plate capacitors that provide local switching energy |
| 03/13/2001 | US6201378 Semiconductor integrated circuit |
| 03/13/2001 | US6201346 EL display device using organic EL element having a printed circuit board |
| 03/13/2001 | US6201308 Semiconductor chip having a low-noise ground line |
| 03/13/2001 | US6201293 Electro optical devices with reduced filter thinning on the edge pixel photosites and method of producing same |
| 03/13/2001 | US6201289 Method of manufacturing an inductor |
| 03/13/2001 | US6201288 Regulating resistor network, semiconductor device including the resistor network, and method for fabricating the device |
| 03/13/2001 | US6201287 Monolithic inductance-enhancing integrated circuits, complementary metal oxide semiconductor (CMOS) inductance-enhancing integrated circuits, inductor assemblies, and inductance-multiplying methods |
| 03/13/2001 | US6201286 Multilayer wiring substrate for hybrid integrated circuit and method for manufacturing the same |
| 03/13/2001 | US6201282 Two bit ROM cell and process for producing same |
| 03/13/2001 | US6201277 Slot trench isolation for flash EPROM |
| 03/13/2001 | US6201275 Semiconductor device having semiconductor regions of different conductivity types isolated by field oxide, and method of manufacturing the same |
| 03/13/2001 | US6201274 Semiconductor device with no step between well regions |
| 03/13/2001 | US6201273 Structure for a double wall tub shaped capacitor |
| 03/13/2001 | US6201271 Where a mixed oxide film of platinum and rhodium is formed as an upper electrode in direct contact with a ferroelectric film |
| 03/13/2001 | US6201270 High speed CMOS photodetectors with wide range operating region and fixed pattern noise reduction |
| 03/13/2001 | US6201269 Junction field effect transistor and method of producing the same |
| 03/13/2001 | US6201267 Compact low power complement FETs |
| 03/13/2001 | US6201259 Tunneling magnetoresistance element, and magnetic sensor, magnetic head and magnetic memory using the element |
| 03/13/2001 | US6201257 Semiconductor X-ray photocathodes devices |
| 03/13/2001 | US6201248 Device and process for reading a matrix of photonic detectors |
| 03/13/2001 | US6201243 Microbridge structure and method for forming the microbridge structure |
| 03/13/2001 | US6201234 Optical operational amplifier |
| 03/13/2001 | US6200905 Method to form sidewall polysilicon capacitors |
| 03/13/2001 | US6200904 Method of forming a contact hole of a DRAM |
| 03/13/2001 | US6200903 Method of manufacturing semiconductor devices |
| 03/13/2001 | US6200878 SOI substrate processing method |
| 03/13/2001 | US6200877 Method of forming a charge storage electrode having a selective hemispherical grains silicon film in a semiconductor device |
| 03/13/2001 | US6200876 Method of producing a semiconductor device |
| 03/13/2001 | US6200861 Method of fabricating high density multiple states mask ROM cells |
| 03/13/2001 | US6200858 Floating gate sidewall structure for the suppression of bird's beak |
| 03/13/2001 | US6200855 Semiconductor memory device, and method for fabricating thereof |
| 03/13/2001 | US6200854 Method of manufacturing dynamic random access memory |
| 03/13/2001 | US6200853 Method of manufacturing semiconductor device having capacitor contact holes |
| 03/13/2001 | US6200851 Memory cell that includes a vertical transistor and a trench capacitor |
| 03/13/2001 | US6200847 Method of manufacturing capacitor of semiconductor device |
| 03/13/2001 | US6200846 Semiconductor device with capacitor formed on substrate and its manufacture method |
| 03/13/2001 | US6200845 Method of forming a storage capacitor |
| 03/13/2001 | US6200843 High-voltage, high performance FETs |
| 03/13/2001 | US6200838 Compound semiconductor device and method of manufacturing the same |
| 03/13/2001 | US6200834 Process for fabricating two different gate dielectric thicknesses using a polysilicon mask and chemical mechanical polishing (CMP) planarization |
| 03/13/2001 | US6200821 Method for fabricating ferroelectric random access memory device |
| 03/13/2001 | US6200629 Multilayer; dielectric, electromigration layer, metallic pattern |
| 03/13/2001 | US6199567 Method and apparatus for manufacturing semiconductor device |
| 03/13/2001 | CA2192630C Fabrication process and fabrication apparatus of soi substrate |
| 03/11/2001 | CA2316459A1 Ccd wafers with titanium refractory metal |
| 03/08/2001 | WO2001017319A1 Organic electroluminescent device and production method |
| 03/08/2001 | WO2001017234A1 Solid-state image pickup device, method of driving the same and camera system |
| 03/08/2001 | WO2001017041A1 Method for forming a patterned semiconductor film |
| 03/08/2001 | WO2001017040A1 A solvent annealing process for forming a thin semiconductor film with advantageous properties |
| 03/08/2001 | WO2001017031A1 Easy shrinkable novel non-volatile semiconductor memory cell utilizing split dielectric floating gate and method for making same |
| 03/08/2001 | WO2001017030A1 Non-volatile memory structure for twin-bit storage and methods of making same |
| 03/08/2001 | WO2001017029A1 Transistor for an electronically driven display |
| 03/08/2001 | WO2001017026A1 Post-fuse blow corrosion prevention structure for copper fuses |
| 03/08/2001 | WO2001017024A1 Fabrication method for pasted soi wafer and pasted soi wafer |
| 03/08/2001 | WO2001017023A1 Nonvolatile memory having high gate coupling capacitance |
| 03/08/2001 | WO2001017022A1 Semiconductor device with buried bitlines |
| 03/08/2001 | WO2001017021A1 Encapsulated tungsten gate mos transistor and memory cell and method of making same |
| 03/08/2001 | WO2001017019A2 Memory with a trench capacitor and a selection transistor and method for producing the same |
| 03/08/2001 | WO2001017018A1 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate |
| 03/08/2001 | WO2001017017A1 Nonvolatile ferroelectric memory and method of manufacture thereof |
| 03/08/2001 | WO2001017016A2 Capacitor-over-bit line memory circuitry |
| 03/08/2001 | WO2001017015A1 Method for producing a dram cell arrangement |
| 03/08/2001 | WO2001017009A1 Method to fabricate a mosfet |
| 03/08/2001 | WO2001017003A1 Method of heat treatment |
| 03/08/2001 | WO2001016960A1 1 transistor cell for eeprom application |
| 03/08/2001 | WO2001016959A1 Floating gate storage cell |
| 03/08/2001 | WO2001016663A1 Load device |
| 03/08/2001 | WO2001016395A1 Titanium containing dielectric films and methods of forming same |
| 03/08/2001 | DE4143476C2 DRAM with impurity region of second conductivity |
| 03/08/2001 | DE19941401C1 Verfahren zur Herstellung einer DRAM-Zellenanordnung A method of manufacturing a DRAM cell arrangement |
| 03/08/2001 | DE10036356A1 Magnetic thin film component with diode switched by controlling spin of injected electrons |
| 03/08/2001 | DE10031480A1 Complementary metal oxide semiconductor image sensor has doping area which are formed at edges of spacer and gate electrode |
| 03/08/2001 | DE10024362A1 Semiconductor device operating on basis of constant current provided by constant current circuit damps noise generated in internal circuits with buffer circuits |
| 03/08/2001 | DE10020150A1 Semiconductor SRAM with reduced storage cell area and improved data retention interval has negative resistance section with tunnel insulating layer formed on active p-type region |
| 03/08/2001 | CA2384004A1 Method to fabricate a mosfet |
| 03/07/2001 | EP1081770A1 Thin-film solar cell module and method of manufacturing the same |
| 03/07/2001 | EP1081767A2 EL display device and manufacturing method thereof |
| 03/07/2001 | EP1081766A1 CCD image sensor using amplification by secondary electron generation |
| 03/07/2001 | EP1081765A2 Integrated circuit built in a substrate protected against a voltage reversal |
| 03/07/2001 | EP1081763A2 Method to trap air for improving the quality factor (Q) of RF inductors in CMOS technology |
| 03/07/2001 | EP1081748A2 Etch stops and alignment marks for bonded wafers |
| 03/07/2001 | EP1081746A2 Metal-oxide-metal structure having a Cu/TaN/Ta2O5 stacked structure incorporated therein |
| 03/07/2001 | EP1081715A1 Logic-merged memory |
| 03/07/2001 | EP1081711A2 Dynamic type memory |
| 03/07/2001 | EP1081676A1 Active matrix liquid crystal display with pixel capacitor |