| Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248) |
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| 03/27/2001 | US6207983 Charge transfer device, and driving method and manufacturing method for the same |
| 03/27/2001 | US6207982 Solid-state image pickup device capable of high-speed transfer of signal charges in horizontal direction |
| 03/27/2001 | US6207981 Charge-coupled device with potential barrier and charge storage regions |
| 03/27/2001 | US6207980 Layout method of a semiconductor device |
| 03/27/2001 | US6207979 Gate array and manufacturing method of semiconductor integrated circuit using gate array |
| 03/27/2001 | US6207977 Vertical MISFET devices |
| 03/27/2001 | US6207971 Thin film transistor suitable for use in an active matrix type display and method of fabricating the same |
| 03/27/2001 | US6207947 Using DUV curing to form a protective coating for color filters |
| 03/27/2001 | US6207944 Semiconductor imaging device |
| 03/27/2001 | US6207579 Method of fabricating self-aligned node |
| 03/27/2001 | US6207574 Method for fabricating a DRAM cell storage node |
| 03/27/2001 | US6207573 Differential trench open process |
| 03/27/2001 | US6207564 Method of forming self-aligned isolated plugged contacts |
| 03/27/2001 | US6207561 After metal deposition, the metal oxide is formed using an oxidation chemistry that includes co2 and h2. the co2/h2 gas ratio is controlled for selective oxidation. |
| 03/27/2001 | US6207547 Bond pad design for integrated circuits |
| 03/27/2001 | US6207539 Semiconductor device having field isolating film of which upper surface is flat and method thereof |
| 03/27/2001 | US6207528 Method for fabricating capacitor of semiconductor device |
| 03/27/2001 | US6207527 Method of manufacturing semiconductor device |
| 03/27/2001 | US6207524 Memory cell with a stacked capacitor |
| 03/27/2001 | US6207521 Thin-film resistor employed in a semiconductor wafer and its method formation |
| 03/27/2001 | US6207519 Method of making semiconductor device having double spacer |
| 03/27/2001 | US6207512 Method and apparatus for improving latchup immunity in a dual-polysilicon gate process |
| 03/27/2001 | US6207509 Method of manufacturing a semiconductor device |
| 03/27/2001 | US6207507 Multi-level flash memory using triple well process and method of making |
| 03/27/2001 | US6207506 Nonvolatile memory and method for fabricating the same |
| 03/27/2001 | US6207504 Method of fabricating flash erasable programmable read only memory |
| 03/27/2001 | US6207503 Method for shrinking array dimensions of split gate flash memory device using multilayer etching to define cell and source line |
| 03/27/2001 | US6207500 DRAM chip fabrication method |
| 03/27/2001 | US6207499 Semiconductor device, method of fabricating the same, and sputtering apparatus |
| 03/27/2001 | US6207496 Method of forming capacitor of semiconductor device |
| 03/27/2001 | US6207495 Method of fabricating capacitors |
| 03/27/2001 | US6207494 Isolation collar nitride liner for DRAM process improvement |
| 03/27/2001 | US6207490 Semiconductor device and method for fabricating the same |
| 03/27/2001 | US6207489 Dielectric film includes a first dielectric layer deposited at a first temperature selected from a designated temperature range, and a second dielectric layer deposited at a second temperature different from the first temperature |
| 03/27/2001 | US6207488 Method for forming a tantalum oxide capacitor using two-step rapid thermal nitridation |
| 03/27/2001 | US6207487 Method for forming dielectric film of capacitor having different thicknesses partly |
| 03/27/2001 | US6207486 Semiconductor device and a method of manufacturing the same |
| 03/27/2001 | US6207484 Method for fabricating BiCDMOS device and BiCDMOS device fabricated by the same |
| 03/27/2001 | US6207480 Method of manufacturing a thin film transistor array panel for a liquid crystal display |
| 03/27/2001 | US6207479 Place and route method for integrated circuit design |
| 03/27/2001 | US6207465 Method of fabricating ferroelectric integrated circuit using dry and wet etching |
| 03/27/2001 | US6207082 Layer-structured oxide and process of producing the same |
| 03/27/2001 | US6207005 Cluster tool apparatus using plasma immersion ion implantation |
| 03/27/2001 | CA2225930C Method and apparatus for monolithic optoelectronic integrated circuit using selective epitaxy |
| 03/22/2001 | WO2001020771A1 A stacked vco resonator |
| 03/22/2001 | WO2001020691A1 Conductive structure based on poly-3,4-alkenedioxythiophene (pedot) and polystyrenesulfonic acid (pss) |
| 03/22/2001 | WO2001020689A1 Method for producing a laterally integrated, monolithic light-emitting semiconductor component and a light-emitting semiconductor component |
| 03/22/2001 | WO2001020682A1 Semiconductor device |
| 03/22/2001 | WO2001020681A1 Trench capacitor comprising capacitor electrodes and corresponding production method |
| 03/22/2001 | WO2001020680A1 Semiconductor device with esd protection |
| 03/22/2001 | WO2001020679A1 Esd protective arrangement for a semiconductor device |
| 03/22/2001 | WO2001020678A1 Esd-protective arrangement for signal inputs and outputs in semiconductor devices with substrate separation |
| 03/22/2001 | WO2001020677A1 Esd protective arrangement for signal inputs and outputs, said arrangement having an overvoltage tolerance |
| 03/22/2001 | WO2001020667A1 Integrated circuit and method of manufacture thereof |
| 03/22/2001 | WO2001020666A1 Integrated circuit |
| 03/22/2001 | WO2001020649A1 Reducing the coupling between the semiconductor substrate and a coil integrated thereon |
| 03/22/2001 | WO2001020591A1 Active matrix electroluminescent display device |
| 03/22/2001 | WO2001020419A1 Semiconductor device |
| 03/22/2001 | WO2001020402A1 Fabrication of finely featured devices by liquid embossing |
| 03/22/2001 | WO2001020356A1 Magnetoresistive sensor or memory elements with decreased magnetic switch field |
| 03/22/2001 | WO2001020280A1 Thermal sensor and method of making same |
| 03/22/2001 | WO2001001502A3 A means for electrical contacting or isolation of organic or inorganic semiconductors and a method for its fabrication |
| 03/22/2001 | WO2000063964B1 Cmos process |
| 03/22/2001 | WO2000013236A9 Layered dielectric on silicon carbide semiconductor structures |
| 03/22/2001 | DE19944012A1 Grabenkondensator mit Kondensatorelektroden und entsprechendes Herstellungsverfahren Grave capacitor capacitor electrode and method of manufacture |
| 03/22/2001 | DE19941147A1 Production of epitaxial layer for dynamic random access memory comprises preparing substrate having single crystalline and insulated regions, growing epitaxial layer on single crystalline region and partially removing epitaxial layer |
| 03/22/2001 | DE19938890A1 Integrierter Schaltkreis und Schaltungsanordnung zur Stromversorgung eines integrierten Schaltkreises The integrated circuit and the circuit arrangement for the power supply of an integrated circuit |
| 03/22/2001 | DE10046668A1 Electric load control circuit uses n-channel MOSFET protected by Zener diode connected across its switched current path and diode between its gate and earth |
| 03/22/2001 | DE10042388A1 Ferroelectric random-access memory has equalising device for equalising adjacent bit lines, pre-loading setting device for bit line pre-loading level and reference level generation device for read amplifier |
| 03/22/2001 | DE10036891A1 Schottky diode production method involves setting up semiconductor substrate, mounting epitaxial layer followed by doping material on substrate, and depositing metal layer on doping material |
| 03/21/2001 | EP1085751A2 Image pickup apparatus |
| 03/21/2001 | EP1085586A2 Magnetoresistive element and magnetic memory device |
| 03/21/2001 | EP1085579A1 Method of manufacturing solar cell |
| 03/21/2001 | EP1085576A2 El display device and method for manufacturing the same |
| 03/21/2001 | EP1085575A1 Electronic device for controlling the "bouncing" in electronic circuits integrated on semiconductor substrate |
| 03/21/2001 | EP1085574A2 Semiconductor device and method of producing the same |
| 03/21/2001 | EP1085519A1 Semiconductor integrated device |
| 03/21/2001 | EP1085518A1 Electrically programmable and erasable non-volatile memory architecture |
| 03/21/2001 | EP1085434A2 Clock circuit and method of designing the same |
| 03/21/2001 | EP1084501A1 Voltage boosting circuit including capacitor with reduced parasitic capacitance |
| 03/21/2001 | EP1084495A1 Eeprom |
| 03/21/2001 | EP1084442A1 Imaging arrangement and method |
| 03/21/2001 | EP1084051A1 Imaging system for vehicle headlamp control |
| 03/21/2001 | EP1040518A4 CHEMICAL MECHANICAL POLISHING OF FeRAM CAPACITORS |
| 03/21/2001 | CN1288263A Semiconductor protection device and mfg. method therefor |
| 03/21/2001 | CN1288262A Method and device for replacing non-working metallic wire for dynamic random access memory |
| 03/21/2001 | CN1288254A Method for mfg. semiconductor device and active array substrate and photoelectric device |
| 03/21/2001 | CN1288251A Semiconductor structure and mfg. method therefor |
| 03/21/2001 | CN1288156A Method for apparatus for sorting particle products using at least two type different grades |
| 03/21/2001 | CN1063580C Process for fabricating semiconductor device with inter-connected multiple layers |
| 03/20/2001 | US6205082 LSI device with memory and logics mounted thereon |
| 03/20/2001 | US6205075 Semiconductor memory device capable of reducing the effect of crosstalk noise between main bit lines and virtual main grounding lines |
| 03/20/2001 | US6205073 Current conveyor and method for readout of MTJ memories |
| 03/20/2001 | US6205064 Semiconductor memory device having program circuit |
| 03/20/2001 | US6205056 Automated reference cell trimming verify |
| 03/20/2001 | US6205054 Nonvolatile memory |
| 03/20/2001 | US6205053 Magnetically stable magnetoresistive memory element |
| 03/20/2001 | US6205052 Magnetic element with improved field response and fabricating method thereof |
| 03/20/2001 | US6205045 Semiconductor memory device having improved cell array layout |
| 03/20/2001 | US6205044 Decoder connection configuration for memory chips with long bit lines |