Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248) |
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04/17/2001 | US6218703 Semiconductor device with control electrodes formed from semiconductor material |
04/17/2001 | US6218700 Remanent memory device |
04/17/2001 | US6218698 Apparatus and method for container floating gate cell |
04/17/2001 | US6218697 Contact in semiconductor memory device |
04/17/2001 | US6218696 Layout and wiring scheme for memory cells with vertical transistors |
04/17/2001 | US6218695 Area efficient column select circuitry for 2-bit non-volatile memory cells |
04/17/2001 | US6218694 Semiconductor memory device and method for manufacturing same |
04/17/2001 | US6218693 Dynamic random access memory (DRAM) cell having a buried horizontal trench capacitor by a novel fabrication method |
04/17/2001 | US6218692 Color active pixel sensor with electronic shuttering, anti-blooming and low cross talk |
04/17/2001 | US6218691 Image sensor with improved dynamic range by applying negative voltage to unit pixel |
04/17/2001 | US6218689 Method for providing a dopant level for polysilicon for flash memory devices |
04/17/2001 | US6218688 Schottky diode with reduced size |
04/17/2001 | US6218686 Charge coupled devices |
04/17/2001 | US6218685 Semiconductor device and method for fabricating the same |
04/17/2001 | US6218667 Sensor element with small area light detecting section of bridge structure |
04/17/2001 | US6218656 Photodiode active pixel sensor with shared reset signal row select |
04/17/2001 | US6218631 Structure for reducing cross-talk in VLSI circuits and method of making same using filled channels to minimize cross-talk |
04/17/2001 | US6218308 Method of manufacturing a contact for a capacitor of high density DRAMs |
04/17/2001 | US6218298 Heating silicon substrate while flowing mixture consisting of tungsten fluoride(wf.sub.6), hydrogen and silicon hydride(sih.sub.4) for forming over walls of trench a nucleation film and to fill trench |
04/17/2001 | US6218296 Semiconductor device with pillar-shaped capacitor storage node and method of fabricating the same |
04/17/2001 | US6218288 Multiple step methods for forming conformal layers |
04/17/2001 | US6218265 Process for fabricating a semiconductor non-volatile memory device with shallow trench isolation (STI) |
04/17/2001 | US6218262 Semiconductor device and method of manufacturing the same |
04/17/2001 | US6218260 Methods of forming integrated circuit capacitors having improved electrode and dielectric layer characteristics and capacitors formed thereby |
04/17/2001 | US6218258 Method for fabricating semiconductor device including capacitor with improved bottom electrode |
04/17/2001 | US6218257 Method of forming semiconductor memory device |
04/17/2001 | US6218253 Method of manufacturing a bipolar transistor by using only two mask layers |
04/17/2001 | US6218248 Semiconductor device and method for fabricating the same |
04/17/2001 | US6218247 Method for fabricating mask ROM |
04/17/2001 | US6218246 Fabrication method of triple polysilicon flash eeprom arrays |
04/17/2001 | US6218245 Method for fabricating a high-density and high-reliability EEPROM device |
04/17/2001 | US6218241 Fabrication method for a compact DRAM cell |
04/17/2001 | US6218240 Method of fabricating low voltage coefficient capacitor |
04/17/2001 | US6218238 Method of fabricating DRAM capacitor |
04/17/2001 | US6218236 Method of forming a buried bitline in a vertical DRAM device |
04/17/2001 | US6218235 Method of manufacturing a DRAM and logic device |
04/17/2001 | US6218234 Dual gate and double poly capacitor analog process integration |
04/17/2001 | US6218233 Thin film capacitor having an improved bottom electrode and method of forming the same |
04/17/2001 | US6218232 Method for fabricating DRAM device |
04/17/2001 | US6218230 Method for producing capacitor having hemispherical grain |
04/17/2001 | US6218229 Method of fabricating semiconductor device having a dual-gate |
04/17/2001 | US6218227 Method to generate a MONOS type flash cell using polycrystalline silicon as an ONO top layer |
04/17/2001 | US6218226 Method of forming an ESD protection device |
04/17/2001 | US6218225 Apparatus and method for high density CMOS gate arrays |
04/17/2001 | US6218219 Semiconductor device and fabrication method thereof |
04/17/2001 | US6218211 Method of fabricating a thinned CCD |
04/17/2001 | US6218210 Method for fabricating image sensor with extended pinned photodiode |
04/17/2001 | US6218197 Embedded LSI having a FeRAM section and a logic circuit section |
04/17/2001 | US6217784 High selectivity etching process for oxides |
04/17/2001 | US6217357 Method of manufacturing two-power supply voltage compatible CMOS semiconductor device |
04/17/2001 | US6216324 Method for a thin film multilayer capacitor |
04/17/2001 | CA2203782C Semiconductor test chip with on-wafer switching matrix |
04/12/2001 | WO2001026425A1 Luminescent device and method for manufacturing the same, and display and illuminator comprising the same |
04/12/2001 | WO2001026227A1 Thyristor arrangement with turnoff protection |
04/12/2001 | WO2001026162A1 Photo-interrupter and semiconductor device using it |
04/12/2001 | WO2001026159A1 Lateral rf mos device with improved breakdown voltage |
04/12/2001 | WO2001026158A2 Center storage node for dram trench capacitors |
04/12/2001 | WO2001026157A1 Active matrix image sensor pixel with reset gate surrounding the photosensitive region |
04/12/2001 | WO2001026156A1 Nonvolatile memory |
04/12/2001 | WO2001026139A2 Dram bit lines and support circuitry contacting scheme |
04/12/2001 | WO2001026137A2 Three dimensional device integration method and integrated device |
04/12/2001 | WO2001026113A1 Integrated circuit with a non-volatile mos ram cell |
04/12/2001 | WO2001026087A1 Active matrix electroluminescent display device |
04/12/2001 | WO2000068710A3 Energy-selective x-ray radiation detection system |
04/12/2001 | WO2000060381A3 Flat panel solid state light source |
04/12/2001 | US20010000245 Conductive sidewall couples to the gate of the gated lateral bipolar transitor and to a retrograded, highly doped bottom layer of the single crystalline semiconductor structure; both bipolar junction transistors (BJT) and metal oxide action |
04/12/2001 | US20010000242 Method for making closely spaced capacitors with reduced parasitic capacitance on a dynamic random access memory (DRAM) device |
04/12/2001 | US20010000218 Semiconductor device |
04/12/2001 | DE19953584C1 Solar module array has solar cell rows of different modules connected in chain with electronic power switch for each module operated in response to shadow falling over module |
04/12/2001 | DE19947117A1 Ferroelektrischer Transistor und dessen Verwendung in einer Speicherzellenanordnung Ferroelectric transistor and its use in a memory cell arrangement |
04/12/2001 | DE19946884A1 Eprom-Struktur für Halbleiterspeicher EPROM structure for semiconductor memories |
04/12/2001 | DE19946883A1 Verfahren zur Herstellung eines integrierten CMOS-Halbleiterspeichers A process for producing an integrated CMOS semiconductor memory |
04/12/2001 | DE19946437A1 Ferroelektrischer Transistor Ferroelectric transistor |
04/12/2001 | DE19946167A1 Integrated half-bridge circuit esp. for control of automobile supply voltage to output load |
04/12/2001 | DE19945939A1 Integrated semiconductor circuit includes a second dielectric layer which lies in the opening of a first dielectric layer and is planar to a first conducting layer |
04/12/2001 | DE19945405A1 Verfahren zum Herstellen einer integrierten Schaltung A method of fabricating an integrated circuit |
04/12/2001 | DE19945136A1 Vertikale Pixelzellen Vertical pixel cells |
04/12/2001 | DE19945023A1 Two-dimensional image detector for electromagnetic radiation, especially X-rays, has very large effective image surface in relation to overall surface area |
04/12/2001 | DE19944731A1 Image detector for electromagnetic radiation is structured in such a way that insulating regions are formed between individual metal electrodes in a photodiode layer |
04/12/2001 | DE19943128A1 Hall-Sensoranordnung zur Offset-kompensierten Magnetfeldmessung Hall sensor array for offset-compensated magnetic field measurement |
04/12/2001 | DE19942692A1 Optoelektronische Mikroelektronikanordnung Optoelectronic microelectronics assembly |
04/12/2001 | DE19941664A1 Floating-Gate-Speicherzelle Floating-gate memory cell |
04/12/2001 | DE19940362A1 Metal oxide semiconductor transistor comprises a sink doped with a first conductivity type in semiconductor substrate, an epitaxial layer and source/drain regions of a second conductivity type and channel region arranged in epitaxial layer |
04/12/2001 | DE10049406A1 X-ray detector unit comprises primary and secondary scintillator materials, a photo diode unit, and an optical coupling material. |
04/12/2001 | DE10043183A1 Semiconductor device e.g., metal oxide semiconductor field effect transistor includes silicon on insulator substrate with semiconductor layer, isolation films, gate electrode, intermediate layer isolation film and filled contact hole |
04/12/2001 | DE10039612A1 Semiconductor device has address decoder detects accesses to overshoot i.e. non-used memory addresses using only part of the outputs of pre-decoders |
04/12/2001 | DE10038290A1 SIMOX semiconductor structure e.g., wafer comprises a silicon substrate, a doped glass layer produced by ion implantation on the substrate and a silicon layer on the substrate |
04/11/2001 | EP1091618A2 Semiconductor device |
04/11/2001 | EP1091617A2 Semiconductor device |
04/11/2001 | EP1091568A2 A solid-state image pickup device, a control method thereof, and a solid-state image pickup apparatus using the same |
04/11/2001 | EP1091567A2 Charge transfer device, solid state image pickup device using the same, and control method |
04/11/2001 | EP1091558A1 Image sensor chip and image reading device provided with it |
04/11/2001 | EP1091419A1 Integrated potentiometer and its manufacturing process |
04/11/2001 | EP1091418A2 NROM cell with self-aligned programming and erasure areas |
04/11/2001 | EP1091415A2 A V-shaped floating gate for a memory cell |
04/11/2001 | EP1091413A2 Fully-depleted, fully-inverted, short-length and vertical channel, dual-gate, cmos fet |
04/11/2001 | EP1091412A2 Charge transfer path having lengthwisely varying channel width and image pickup device using it |
04/11/2001 | EP1091411A2 A solid-state image pickup device |
04/11/2001 | EP1091410A2 Solid state imaging device and method of manufacturing the same |
04/11/2001 | EP1091409A2 Solid-state image pickup device and image pickup system |