Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
10/2001
10/31/2001EP1149408A1 Microelectronic structure
10/31/2001EP1149391A1 Multi-track integrated spiral inductor
10/31/2001EP1149297A1 A scan test point observation system and method
10/31/2001EP0838088B1 Process for manufacturing an integrated cmos circuit
10/31/2001EP0654168B1 Fault-tolerant hierarchical bus system
10/31/2001DE10105071A1 CMOS-image sensor arrangement e.g. for digital camera of personal computer (PC), has photo-diode formed on the lower face of the active zone and the transistors for transmission
10/31/2001DE10019316A1 Photovoltaic cladding element for building has solar cells connected in strings protected against hot-spots by Schottky diode chips acting as bypass diodes
10/31/2001CN1320277A Electronic switching device with at least two semiconductor components
10/31/2001CN1320274A Voltage-cycling recovery of process-damaged ferroelectric films
10/31/2001CN1320246A Clocked integrated semiconductor circuit and method for operating the same
10/31/2001CN1320214A Circuit configuration with a scan path that can be dactivated
10/31/2001CN1319895A Semconductor device and making method thereof
10/31/2001CN1319894A Semiconductor IC
10/31/2001CN1319893A Electric capacitor structure and method for making same
10/31/2001CN1319892A Photoelectric device
10/31/2001CN1319888A Heat conduction itensified semicondcutor structure and making process
10/31/2001CN1319886A Method for forming self-aligning contact structure in semiconductor IC device
10/31/2001CN1319884A Processaable isolation layer grid inlay technology used in sub 0.05 micrometer MOS device
10/31/2001CN1319881A Method for forming self-aligning contact welding disc in metal inlay grid technology
10/31/2001CN1319846A MRAM equipment containing differential check amplifier
10/31/2001CN1319832A Electric lighting device, its making method and electronic equipment
10/31/2001CN1319831A Attaching type area sensor and indicator having same
10/31/2001CN1074226C Thin film actuated mirror array for use in an optical projection system and method for the manufacture thereof
10/31/2001CN1074167C Semi-conductor device
10/31/2001CN1074166C Method for analyzing defects in semiconductor device
10/30/2001USRE37424 Mixed technology integrated device comprising complementary LDMOS power transistors, CMOS and vertical PNP integrated structures having an enhanced ability to withstand a relatively high supply voltage
10/30/2001US6311315 Semiconductor integrated circuit, design method and computer-readable recording medium
10/30/2001US6310933 Charge transferring device and charge transferring method which can reduce floating diffusion capacitance
10/30/2001US6310826 Semiconductor device having a test circuit
10/30/2001US6310815 Multi-bank semiconductor memory device suitable for integration with logic
10/30/2001US6310807 Semiconductor integrated circuit device including tester circuit for defective memory cell replacement
10/30/2001US6310800 Non-volatile semiconductor memory device and method for driving the same
10/30/2001US6310798 Semiconductor memory and method for manufacture thereof
10/30/2001US6310782 Apparatus for maximizing memory density within existing computer system form factors
10/30/2001US6310688 Method for measuring the parameter of a rough film
10/30/2001US6310667 Liquid crystal display device and fabrication method thereof
10/30/2001US6310495 Clock wave noise reducer
10/30/2001US6310487 Semiconductor integrated circuit and testing method thereof
10/30/2001US6310402 Semiconductor die having input/output cells and contact pads in the periphery of a substrate
10/30/2001US6310399 Semiconductor memory configuration with a bit-line twist
10/30/2001US6310397 Butted contact resistance of an SRAM by double VCC implantation
10/30/2001US6310385 High band gap layer to isolate wells in high voltage power integrated circuits
10/30/2001US6310384 Low stress semiconductor devices with thermal oxide isolation
10/30/2001US6310382 Multicolor sensor
10/30/2001US6310380 Electrostatic discharge protection transistor structure with a trench extending through the source or drain silicide layers
10/30/2001US6310379 NMOS triggered NMOS ESD protection circuit using low voltage NMOS transistors
10/30/2001US6310377 Semiconductor device having an SOI structure
10/30/2001US6310376 Semiconductor storage device capable of improving controllability of density and size of floating gate
10/30/2001US6310375 Trench capacitor with isolation collar and corresponding manufacturing method
10/30/2001US6310374 Nonvolatile semiconductor memory device having extracting electrode
10/30/2001US6310373 Metal insulator semiconductor structure with polarization-compatible buffer layer
10/30/2001US6310372 Substrate for electro-optical apparatus, electro-optical apparatus, method for driving electro-optical apparatus, electronic device and projection display device
10/30/2001US6310371 Fingerprint sensor chip
10/30/2001US6310370 Solid state image sensing device and method of manufacturing the same
10/30/2001US6310367 MOS transistor having a tensile-strained SI layer and a compressive-strained SI-GE layer
10/30/2001US6310366 Retrograde well structure for a CMOS imager
10/30/2001US6310365 Surface voltage sustaining structure for semiconductor devices having floating voltage terminal
10/30/2001US6310345 Polarization-resolving infrared imager
10/30/2001US6310281 Thin-film, flexible photovoltaic module
10/30/2001US6309983 Low temperature sacrificial oxide formation
10/30/2001US6309975 Methods of making implanted structures
10/30/2001US6309973 Semiconductor processing methods of forming a conductive projection and methods of increasing alignment tolerances
10/30/2001US6309960 Method of fabricating a semiconductor device
10/30/2001US6309950 Methods for making silicon-on-insulator structures
10/30/2001US6309945 Process for producing semiconductor substrate of SOI structure
10/30/2001US6309940 Latch-up resistant CMOS structure
10/30/2001US6309939 Method of manufacturing a semiconductor device
10/30/2001US6309937 Method of making shallow junction semiconductor devices
10/30/2001US6309931 Method of making a semiconductor device with sidewall insulating layers in the capacitor contact hole
10/30/2001US6309930 SRAM cell arrangement and method for manufacturing same
10/30/2001US6309928 Split-gate flash cell
10/30/2001US6309926 Thin resist with nitride hard mask for gate etch application
10/30/2001US6309925 Method for manufacturing capacitor
10/30/2001US6309922 Method for fabrication of on-chip inductors and related structure
10/30/2001US6309921 Semiconductor device and method for fabricating semiconductor device
10/30/2001US6309919 Method for fabricating a trench-gated vertical CMOS device
10/30/2001US6309905 Stripe photodiode element with high quantum efficiency for an image sensor cell
10/30/2001US6309903 Method for manufacturing fringe field switching mode liquid crystal display device
10/30/2001US6309896 Method of manufacturing a ferroelectric film
10/30/2001US6309800 Irradiating a mask to enlarge circuit pattern
10/30/2001US6309505 Substrate processing apparatus and method
10/25/2001WO2001080319A2 Improved method of fabrication of color changing medium layers in organic light emitting devices resulting in improved light extraction
10/25/2001WO2001080318A1 Semiconductor device and method of manufacturing thereof
10/25/2001WO2001080310A1 Method of manufacturing a semiconductor device
10/25/2001WO2001080247A1 Semiconductor device
10/25/2001WO2001047039A8 Method of making a iii-nitride light-emitting device with increased light generating capability
10/25/2001WO2001026158A3 Center storage node for dram trench capacitors
10/25/2001WO2001006765A8 E-film cartridge with sensor avoidance feature
10/25/2001WO2000042231A9 Polycrystalline silicon germanium films for forming micro-electromechanical systems
10/25/2001US20010034135 Method of manufacturing of semiconductor device
10/25/2001US20010034133 Method of fabricating a DRAM cell configuration
10/25/2001US20010034113 Method and system for improved control of lines adjacent to a select gate using a mask assist feature
10/25/2001US20010034109 Trench seimconductor devices reduced trench pitch
10/25/2001US20010034108 Semiconductor device and method for manufacturing the same
10/25/2001US20010034105 Technique for suppression of edge current in semiconductor devices
10/25/2001US20010034104 Method for manufacturing semiconductor device
10/25/2001US20010034103 Bipolar transistor manufacturing method
10/25/2001US20010034102 Method for fabricating nonvolatile semiconductor memory device
10/25/2001US20010034100 Methods of forming self-aligned contact pads on electrically conductive lines
10/25/2001US20010034099 Read-only memory and method for fabricating the same
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