Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
10/2002
10/15/2002US6465826 The ferroelectric capacitor is protected by the hydrogen barrier layer against hydrogen during a hydrogen-annealing process.
10/15/2002US6465825 Single crystal si substrate; a mgo buffer layer epitaxially grown on said single crystal si substrate; and a metallic thin film made of ir or rh epitaxially grown on said mgo buffer layer.
10/15/2002US6465824 Imager structure
10/15/2002US6465823 Dynamic threshold voltage metal insulator semiconductor effect transistor
10/15/2002US6465822 Semiconductor device having a reduced-capacitance conductive layer and fabrication method for the same
10/15/2002US6465821 Has an effective pixel region for detecting optical information of a subject and an ineffective pixel region for detecting optical black.
10/15/2002US6465820 CMOS compatible single phase CCD charge transfer device
10/15/2002US6465819 Solid state imaging apparatus with transistors having different gate insulating film thickness and manufacturing method for the same
10/15/2002US6465817 Semiconductor integrated circuit and digital camera comprising the same
10/15/2002US6465806 Semiconductor device, display device, and method for producing a semiconductor device
10/15/2002US6465803 Semiconductor hetero-interface photodetector
10/15/2002US6465798 Large area infrared scene emitter RIIC
10/15/2002US6465790 Micro gamma camera with semiconducting detectors
10/15/2002US6465786 Deep infrared photodiode for a CMOS imager
10/15/2002US6465768 MOS structure with improved substrate-triggered effect for on-chip ESD protection
10/15/2002US6465375 Single electron MOSFET memory device and method
10/15/2002US6465371 Atomic layer deposition (ald) using zirconium tetra-tert-butoxide as a zirconium source material instead of conventional zrcl4, so resulting film is chlorine-free
10/15/2002US6465370 Low leakage, low capacitance isolation material
10/15/2002US6465364 Method for fabrication of a contact plug in an embedded memory
10/15/2002US6465351 Method of forming a capacitor lower electrode using a CMP stopping layer
10/15/2002US6465333 Method of manufacturing a circuit
10/15/2002US6465331 DRAM fabricated on a silicon-on-insulator (SOI) substrate having bi-level digit lines
10/15/2002US6465327 Method for producing a thin membrane and resulting structure with membrane
10/15/2002US6465321 Method of forming a storage node in a semiconductor device
10/15/2002US6465319 Aluminum-filled self-aligned trench for stacked capacitor structure and methods
10/15/2002US6465318 Bipolar transistor and method for producing same
10/15/2002US6465316 SOI substrate and semiconductor device
10/15/2002US6465310 Methods of forming self-aligned contact pads on electrically conductive lines
10/15/2002US6465308 Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implant
10/15/2002US6465306 Simultaneous formation of charge storage and bitline to wordline isolation
10/15/2002US6465303 Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory
10/15/2002US6465302 Method of manufacturing a flash memory device
10/15/2002US6465301 Method for fabricating capacitor of semiconductor device
10/15/2002US6465300 Patterning a dielectric; forming silicide
10/15/2002US6465299 Semiconductor memory and method for fabricating the same
10/15/2002US6465298 Method of fabricating a semiconductor-on-insulator memory cell with buried word and body lines
10/15/2002US6465297 Method of manufacturing a semiconductor component having a capacitor
10/15/2002US6465293 Method of manufacturing a flash memory cell
10/15/2002US6465292 Method of manufacturing a semiconductor device having reduced power consumption without a reduction in the source/drain breakdown voltage
10/15/2002US6465291 High-voltage transistor with buried conduction layer
10/15/2002US6465290 Method of manufacturing a semiconductor device using a polymer film pattern
10/15/2002US6465289 Method of fabricating monolithic multifunction integrated circuit devices
10/15/2002US6465287 Method for fabricating a semiconductor device using a metal catalyst and high temperature crystallization
10/15/2002US6465286 Method of fabricating an imager array
10/15/2002US6465284 Semiconductor device and method for manufacturing the same
10/15/2002US6465283 Structure and fabrication method using latch-up implantation for improving latch-up immunity in CMOS fabrication process
10/15/2002US6465270 Process for producing a semiconductor device
10/15/2002US6465268 Method of manufacturing an electro-optical device
10/15/2002US6465262 Method for manufacturing a semiconductor device
10/15/2002US6465261 Method for manufacturing FeRAM device
10/15/2002US6465260 Ferroelectric capacitor includes nb doped lead zirconate titanate (pnzt); made by preparing a sol-gel coating solution of pnzt for use in a ferroelectric random access memory
10/15/2002US6465112 Method for fabricating semiconductor device
10/15/2002US6465053 Method for manufacturing a magnetic device
10/15/2002US6464898 Fluorescence conversion medium and display device comprising it
10/10/2002WO2002080376A2 A method for timing control
10/10/2002WO2002080368A1 Buffer circuit having reduced leakage current and method of reducing leakage current in a field programmable device
10/10/2002WO2002080290A2 Bistable molecularr mechanical devices with a band gap change activated by an electric field for electronic switching, gating and memory applications.
10/10/2002WO2002080283A1 Nonvolatile memory array structure and its operating method
10/10/2002WO2002080279A1 Three-dimensional metal devices highly suspended above semiconductor substrate, their circuit model, and method for manufacturing the same
10/10/2002WO2002080278A1 Improved electroluminescent devices and displays with integrally fabricated address and logic devices fabricated by printing or weaving
10/10/2002WO2002080277A1 Simox substrate production process and simox substrate
10/10/2002WO2002080276A1 Production method for simox substrate and simox substrate
10/10/2002WO2002080275A2 Memory cell arrays and method for the production thereof
10/10/2002WO2002080274A2 Electrical discharge circuit
10/10/2002WO2002080266A1 Soi devices with integrated gettering structure
10/10/2002WO2002080244A2 Improved process for deposition of semiconductor films
10/10/2002WO2002080241A1 Method of forming strained silicon on insulator (ssoi) and structures formed thereby
10/10/2002WO2002080235A2 A method for fabrication of a high capacitance interpoly dielectric
10/10/2002WO2002080228A2 Structure including cubic boron nitride films
10/10/2002WO2002080227A2 Memory address and decode circuits with ultra thin body transistors
10/10/2002WO2002063691A3 Active pixel cell with charge storage
10/10/2002WO2002048668A3 Integrated cmos capacitive pressure sensor
10/10/2002WO2002043148A3 Micromachined infrared sensitive pixel and infrared imager
10/10/2002WO2002043117A3 Trench gate fermi-threshold field effect transistors and methods of fabricating the same
10/10/2002WO2002041404A3 Trench-gate field-effect transistors and their manufacture
10/10/2002WO2002027795A3 Fully synthesisable and highly area efficient very large scale integration (vlsi) electrostatic discharge (esd) protection circuit
10/10/2002WO2002025734A3 High voltage tolerant electrostatic discharge (esd) bus clamp
10/10/2002US20020147553 Electromagnetic disturbance analysis method and apparatus and semiconductor device manufacturing method using the method
10/10/2002US20020146916 Semiconductor device having a high-dielectric gate insulation film and fabrication process thereof
10/10/2002US20020146899 Method of forming metal contact in semiconductor device
10/10/2002US20020146898 Bonding pad, semiconductor device and wire bonding method
10/10/2002US20020146895 Providing silicon substrate having surface; forming by atomic layer deposition seed layer on surface of silicon substrate; forming by atomic layer deposition of layers of high dielectric constant oxide on seed layer
10/10/2002US20020146894 Semiconductor processing method, method of forming DRAM circuitry, method of depositing a tungsten comprising layer over a substrate, method of forming a transistor gate line over a substrate, method of forming a patterned substantially crystalline Ta2O5 comprising material, and method of forming a capacitor dielectric region comprising substantially crystalline Ta2O5 comprising material
10/10/2002US20020146893 Separation layer is irradiated with incident light so as to cause exfoliation in separation layer and/or at the interface, and to detach detached member from substrate
10/10/2002US20020146892 Semiconductor member manufacturing method and semiconductor device manufacturing method
10/10/2002US20020146889 Process for implanting a deep subcollector with self-aligned photo registration marks
10/10/2002US20020146887 Method for forming magnetoresistive random access memory with magnetic tunnelling junction
10/10/2002US20020146886 Self aligned method of forming a semiconductor memory array of floating gate memory cells with vertical control gate sidewalls and insulation spacers, and a memory array made thereby
10/10/2002US20020146885 Method of fabricating a nitride read only memory cell
10/10/2002US20020146884 Non-volatile semiconductor memory device and manufacturing method thereof
10/10/2002US20020146883 Semiconductor devices having a non-volatile memory transistor and methods for manufacturing the same
10/10/2002US20020146882 Method for fabricating a capacitor of a semiconductor device
10/10/2002US20020146878 Semiconductor device
10/10/2002US20020146874 Method for manufacturing a semiconductor device
10/10/2002US20020146871 Semiconductor device, method for manufacturing the same, and radiation detector
10/10/2002US20020146865 Method for selecting from standardized set of integrated circuit mask features
10/10/2002US20020146858 Semiconductor Device
10/10/2002US20020146851 Method of forming magnetic memory
10/10/2002US20020146850 Method for forming capacitor of semiconductor device
10/10/2002US20020146849 Method for forming minimally spaced MRAM structures
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