Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
11/2002
11/19/2002US6483163 Photoelectric conversion devices and photoelectric conversion apparatus employing the same
11/19/2002US6483156 Double planar gated SOI MOSFET structure
11/19/2002US6483155 Semiconductor device having pocket and manufacture thereof
11/19/2002US6483152 Semiconductor device
11/19/2002US6483151 Semiconductor device and method of manufacturing the same
11/19/2002US6483150 Semiconductor device with both memories and logic circuits and its manufacture
11/19/2002US6483147 Through wafer backside contact to improve SOI heat dissipation
11/19/2002US6483146 Nonvolatile semiconductor memory device and manufacturing method thereof
11/19/2002US6483145 Electrically erasable programmable read-only memory (EEPROM) devices including multilayer sense and select transistor gates
11/19/2002US6483144 Semiconductor device having self-aligned contact and landing pad structure and method of forming same
11/19/2002US6483143 Semiconductor device having a capacitor structure including a self-alignment deposition preventing film
11/19/2002US6483141 Semiconductor memory device and manufacturing method thereof
11/19/2002US6483140 DRAM storage node with insulating sidewalls
11/19/2002US6483139 Semiconductor memory device formed on semiconductor substrate
11/19/2002US6483138 Semiconductor apparatus formed by SAC (self-aligned contact)
11/19/2002US6483137 Ferroelectricity
11/19/2002US6483136 Semiconductor integrated circuit and method of fabricating the same
11/19/2002US6483133 EEPROM with high channel hot carrier injection efficiency
11/19/2002US6483132 Charge coupled device with separate isolation region
11/19/2002US6483131 High density and high speed cell array architecture
11/19/2002US6483129 Retrograde well structure for a CMOS imager
11/19/2002US6483123 Organic electroluminescent device having organic field effect transistor and organic light-emitting diode and method for fabricating the same
11/19/2002US6483116 High performance ultraviolet imager for operation at room temperature
11/19/2002US6483115 Method for enhancing scintillator adhesion to digital x-ray detectors
11/19/2002US6483111 Thermal infrared-detector array and method of fabrication thereof
11/19/2002US6483101 Molded image sensor package having lens holder
11/19/2002US6483100 Photonic device
11/19/2002US6483099 Organic diodes with switchable photosensitivity
11/19/2002US6483098 Side-illuminated type semiconductor photodetector device and method of manufacturing the same
11/19/2002US6483042 Substrate for mounting semiconductor integrated circuit device
11/19/2002US6482745 Etching methods for anisotropic platinum profile
11/19/2002US6482738 Method of locally forming metal silicide layers
11/19/2002US6482737 Fabrication method of implanting silicon-ions into the silicon substrate
11/19/2002US6482736 Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers
11/19/2002US6482731 Semiconductor processing methods of forming devices on a substrate, forming device arrays on a substrate, forming conductive lines on a substrate, and forming capacitor arrays on a substrate, and integrated circuitry
11/19/2002US6482728 Method for fabricating floating gate
11/19/2002US6482727 Method of producing a semiconductor integrated circuit device and the semiconductor integrated circuit device
11/19/2002US6482723 Method for forming self-aligned floating gates
11/19/2002US6482708 Nonvolatile memory device and method for manufacturing the same
11/19/2002US6482706 Method to scale down device dimension using spacer to confine buried drain implant
11/19/2002US6482703 Method for fabricating an electrostatic discharge device in a dual gate oxide process
11/19/2002US6482702 Method of forming and recognizing an identification mark for read-only memory
11/19/2002US6482700 Split gate field effect transistor (FET) device with enhanced electrode registration and method for fabrication thereof
11/19/2002US6482698 Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip
11/19/2002US6482697 Method of forming a highly integrated non-volatile semiconductor memory device
11/19/2002US6482696 Method of forming storage nodes in a DRAM
11/19/2002US6482695 Method for fabricating semiconductor device including stacked capacitors
11/19/2002US6482694 Semiconductor device structure including a tantalum pentoxide layer sandwiched between silicon nitride layers
11/19/2002US6482693 Methods of forming diodes
11/19/2002US6482692 Method of manufacturing a semiconductor device, having first and second semiconductor regions with field shield isolation structures and a field oxide film covering a junction between semiconductor regions
11/19/2002US6482690 Method for fabricating semiconductor device
11/19/2002US6482686 Method for manufacturing a semiconductor device
11/19/2002US6482669 Colors only process to reduce package yield loss
11/19/2002US6482667 Solid state image sensor device and method of fabricating the same
11/19/2002US6482658 Nonvolatile ferroelectric memory having shunt lines
11/19/2002US6482657 Methods of manufacturing tunnel magnetoresistive element, thin-film magnetic head and memory element
11/19/2002US6482641 DNA-based integrated circuit
11/19/2002US6482564 Disposing active primer between receptor substrate and a thermal transfer donor; disposing transfer assist layer on active primer; selectively thermally transferring portion of transfer layer from donor to receptor
11/19/2002US6482538 Microelectronic piezoelectric structure and method of forming the same
11/19/2002CA2252875C Semiconductor device and fabrication method thereof
11/17/2002CA2380209A1 Organic semiconductor devices with short channels
11/14/2002WO2002091496A2 Reversible field-programmable electric interconnects
11/14/2002WO2002091494A1 Switch element having memeory effect
11/14/2002WO2002091486A1 An opto-coupling device structure and method therefor
11/14/2002WO2002091480A2 Optical device and method therefor
11/14/2002WO2002091476A1 Floating gate memory device using composite molecular material
11/14/2002WO2002091473A1 Ferroelectric composite material, method of making same and memory utilizing same
11/14/2002WO2002091471A2 Integrated circuit
11/14/2002WO2002091470A1 Electroluminescent device
11/14/2002WO2002091463A1 Semiconductor process and integrated circuit
11/14/2002WO2002091455A1 Thin film transistor self-aligned to a light-shield layer
11/14/2002WO2002091451A2 Methods of forming gap fill and layers formed thereby
11/14/2002WO2002091432A2 Microelectronic structure comprising a hydrogen barrier layer
11/14/2002WO2002091424A1 A cmos system for capturing an image and a method thereof
11/14/2002WO2002091384A1 A memory device with a self-assembled polymer film and method of making the same
11/14/2002WO2002091190A2 Memory with a bit line block and/or a word line block for preventing reverse engineering
11/14/2002WO2002091006A1 Method for measuring fuse resistance in a fuse array
11/14/2002WO2002078057A3 A transpinnor-based sample-and-hold circuit and applications
11/14/2002WO2002078052A3 Device with at least two organic electronic components and method for producing the same
11/14/2002WO2002075811A3 Method for fabricating a metal resistor in an ic chip and related structure
11/14/2002WO2002075344A3 Semiconductor element comprising a semimagnetic contact
11/14/2002WO2002073699A3 Nanofabrication
11/14/2002WO2002073661A3 Extraction method of defect density and size distributions
11/14/2002WO2002069284A8 Time-detection device and time- detection method by using a semi-conductor element
11/14/2002WO2002059968A3 Integrated circuits protected against reverse engineering using an apparent metal contact line terminating on field oxide and method
11/14/2002WO2002049076A3 Semiconductor device layout
11/14/2002WO2001027972A9 Molecular scale electronic devices
11/14/2002US20020170010 Power reduction in module-based scan testing
11/14/2002US20020168868 First and second surfaces with different morphology, adding trisilane to the chamber under chemical vapor depostion, and depositing a silane containing film
11/14/2002US20020168837 Attaching silicon oxide layer on silicon layer by growing or depositing, then attaching sapphire layer to oxide layer using wafer bonding
11/14/2002US20020168833 Manufacturing method of semiconductor device and designing method of semiconductor device
11/14/2002US20020168831 Employing a ceramic capacitor which realizes a low voltage operation
11/14/2002US20020168830 Double sided container process used during the manufacture of a semiconductor device
11/14/2002US20020168827 Suppressing electric charges generated on substrate and which flow to ground potential through substrate prevents damages to substrate due to charge-up
11/14/2002US20020168824 Flash memory cell fabrication sequence
11/14/2002US20020168822 Method of fabricating mask read only memory
11/14/2002US20020168821 Fabrication process for a super-self-aligned trench-gated DMOS with reduced on-resistance
11/14/2002US20020168820 Microelectronic programmable device and methods of forming and programming the same
11/14/2002US20020168819 Flash memory with conformal floating gate and the method of making the same
11/14/2002US20020168817 Fabricating ferroelectric memory device
1 ... 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 ... 2293