Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Patents for H01L 27 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate (229,248)
05/2003
05/27/2003US6570229 Semiconductor device
05/27/2003US6570227 High-performance high-density CMOS SRAM cell
05/27/2003US6570226 Device and circuit for electrostatic discharge and overvoltage protection applications
05/27/2003US6570225 Method for improved electrostatic discharge protection
05/27/2003US6570223 Functional device and method of manufacturing the same
05/27/2003US6570222 Solid state imaging device having a photodiode and a MOSFET
05/27/2003US6570221 Bonding of silicon wafers
05/27/2003US6570216 EEPROM having a peripheral integrated transistor with thick oxide
05/27/2003US6570215 Spacers increase the capacitive coupling between the floating gate and the control gate
05/27/2003US6570214 Control-gate length and the implanted region are separately defined by two sidewall dielectric spacers formed over a sidewall on the common-source region and, therefore, can be controlled to be smaller
05/27/2003US6570213 Self-aligned split-gate flash memory cell and its contactless NOR-type memory array
05/27/2003US6570212 Complementary avalanche injection EEPROM cell
05/27/2003US6570211 2Bit/cell architecture for floating gate flash memory product and associated method
05/27/2003US6570210 Multilayer pillar array capacitor structure for deep sub-micron CMOS
05/27/2003US6570209 Merged self-aligned source and ONO capacitor for split gate non-volatile memory
05/27/2003US6570207 Can be accessed directly without having to turn on a transfer gate.
05/27/2003US6570206 Semiconductor device
05/27/2003US6570205 DRAM cell
05/27/2003US6570203 Semiconductor device and method of manufacturing the same
05/27/2003US6570202 Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricating same
05/27/2003US6570201 CMOS image sensor capable of increasing punch-through voltage and charge integration of photodiode
05/27/2003US6570198 Linear image sensor integrated circuit
05/27/2003US6570197 Optical device having sensing TGTs and switching TFTs with different active layer thickness
05/27/2003US6570195 Power/ground metallization routing in a semiconductor device
05/27/2003US6570187 Silicon light-emitting device and method for the production thereof
05/27/2003US6570183 Liquid crystal display for preventing galvanic phenomenon
05/27/2003US6570161 X-ray detecting device and fabricating method thereof
05/27/2003US6570149 Photodetector having a control block for maintaining a detection signal within a predetermined tolerance range
05/27/2003US6570145 Phase grating image sensing device and method of manufacture
05/27/2003US6570144 Active pixel circuit in CMOS image sensor
05/27/2003US6569759 Semiconductor device having interconnection implemented by refractory metal nitride layer and refractory metal silicide layer and process of fabrication thereof
05/27/2003US6569757 Methods for forming co-axial interconnect lines in a CMOS process for high speed applications
05/27/2003US6569746 Methods of forming integrated circuit capacitors having electrodes therein that comprise conductive plugs
05/27/2003US6569745 Shared bit line cross point memory array
05/27/2003US6569744 Method of converting a metal oxide semiconductor transistor into a bipolar transistor
05/27/2003US6569742 Method of manufacturing semiconductor integrated circuit device having silicide layers
05/27/2003US6569740 Method of forming a semiconductor device having a buffer
05/27/2003US6569736 Method for fabricating square polysilicon spacers for a split gate flash memory device by multi-step polysilicon etch
05/27/2003US6569735 Manufacturing method for isolation on non-volatile memory
05/27/2003US6569734 Method for two-sided fabrication of a memory array
05/27/2003US6569733 Gate device with raised channel and method
05/27/2003US6569732 Integrated process sequence allowing elimination of polysilicon residue and silicon damage during the fabrication of a buried stack capacitor structure in a SRAM cell
05/27/2003US6569731 Method of forming a capacitor dielectric structure
05/27/2003US6569729 Method of fabricating three dimensional CMOSFET devices for an embedded DRAM application
05/27/2003US6569727 Method of making a single-deposition-layer-metal dynamic random access memory
05/27/2003US6569726 Method of manufacturing MOS transistor with fluoride implantation on silicon nitride etching stop layer
05/27/2003US6569725 Thin film transistor array and method for fabricating the same
05/27/2003US6569724 Insulated gate field effect transistor and method for forming the same
05/27/2003US6569723 Crossed strapped VSS layout for full CMOS SRAM cell
05/27/2003US6569721 Method of manufacturing a thin film transistor to reduce contact resistance between a drain region and an interconnecting metal line
05/27/2003US6569720 Method for fabricating thin-film transistor
05/27/2003US6569717 Semiconductor device production method, electro-optical device production method, semiconductor device, and electro-optical device
05/27/2003US6569714 Method and apparatus for a dense metal programmable ROM
05/27/2003US6569713 Method of fabricating read only memory
05/27/2003US6569706 Fabrication of organic light emitting diode using selective printing of conducting polymer layers
05/27/2003US6569705 Metal structure for a phase-change memory device
05/27/2003US6569703 Method of manufacturing solid-state image sensing device
05/27/2003US6569700 Method of reducing leakage current of a photodiode
05/27/2003US6569697 Method of fabricating electrodes
05/27/2003US6568243 Method of evaluating capacitance value of capacitor on semiconductor substrate
05/22/2003WO2003043382A1 Color light emitting device
05/22/2003WO2003043317A1 Image sensor and imaging system comprising the image sensor
05/22/2003WO2003043100A1 Solar cell with organic material in the photovoltaic layer and method for the production thereof
05/22/2003WO2003043094A1 Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion
05/22/2003WO2003043089A1 A field effect transistor semiconductor device
05/22/2003WO2003043088A1 Memory device
05/22/2003WO2003043087A1 Semiconductor device
05/22/2003WO2003043080A1 Lateral pnp transistor device, integrated circuit, and fabrication process thereof
05/22/2003WO2003043079A1 Semiconductor process and pmos varactor
05/22/2003WO2003043044A1 Mems device having a trilayered beam and related methods
05/22/2003WO2003043042A1 Mems device having electrothermal actuation and release and method for fabricating
05/22/2003WO2003043038A2 Mems device having contact and standoff bumps and related methods
05/22/2003WO2003043036A1 Method for homogeneously magnetizing an exchange-coupled layer system of a digital magnetic memory location device
05/22/2003WO2003043021A1 A multi-port static random access memory
05/22/2003WO2003043020A1 Cladding mram multiple magnetic layer device
05/22/2003WO2003043019A1 Cladding field enhancement of an mram device
05/22/2003WO2003043018A1 Magnetoresistance random access memory for improved scalability
05/22/2003WO2003043017A2 Magnetic device with magnetic tunnel junction, memory array and read/write methods using same
05/22/2003WO2003043015A2 Multiple turn for conductive line programming mram
05/22/2003WO2003043014A1 Voltage booster for non-volatile memories
05/22/2003WO2003043013A1 A matrix-addressable optoelectronic apparatus and electrode means in the same
05/22/2003WO2003042966A1 Display for a large panel display consisting of tiled displays
05/22/2003WO2003042753A1 Display with micro pockets
05/22/2003WO2003042721A2 Trilayered beam mems device and related methods
05/22/2003WO2003019564A3 Magnetoresistive level generator
05/22/2003WO2003012951A3 Esd protection devices for a differential pair of transistors
05/22/2003WO2003003457A3 Design of lithography alignment and overlay measurement marks on damascene surface
05/22/2003WO2002088647A3 Millimeter-wave terrestrial imager
05/22/2003WO2002073657A3 Semiconductor memory location comprising a trench capacitor and method for the production thereof
05/22/2003WO2002065507A3 Dynamic memory based on single electron storage
05/22/2003WO2002059968B1 Integrated circuits protected against reverse engineering using an apparent metal contact line terminating on field oxide and method
05/22/2003WO2002058109A3 Reduced aspect ratio digit line contact process flow used during the formation of a semiconductor dram device
05/22/2003WO2002056473A3 Sub-micron high input voltage tolerant input output (i/o) circuit
05/22/2003US20030097609 Flash EEprom system
05/22/2003US20030096508 Reactive sputtering a metal oxide layer from a target of the metal onto the substrate characterised in that the support is biased to induce a direct current (DC) voltage across the depositing dielectric as it forms; making capacitors
05/22/2003US20030096501 For MIS (metal insulator semiconductor) transistor of which gate length, the width of the gate electrode is less than 0.1 mu m; gate insulating film is made of a high dielectric constant material
05/22/2003US20030096497 Electrode structure for use in an integrated circuit
05/22/2003US20030096492 Comprises dielectric film on wafer and forms mask pattern containing functional element or wire; miniaturization
05/22/2003US20030096484 Method of fabricating MOS transistor having shallow source/drain junction regions
05/22/2003US20030096483 Method of manufacturing mos transistor with fluoride implantation on silicon nitride etching stop layer
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