Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 7 - Arrangements for writing information into, or reading information out from, a digital store
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/1993
11/30/1993US5267205 Semiconductor memory device
11/30/1993US5267203 Sense amplifier control circuit of a semiconductor memory device
11/30/1993US5267200 Semiconductor memory device and operating method thereof with transfer transistor used as a holding means
11/30/1993US5267198 Static memory containing sense amp and sense amp switching circuit
11/30/1993US5267197 Read/write memory having an improved write driver
11/30/1993US5267191 FIFO memory system
11/25/1993WO1993019468A3 Flash-clear of ram array using partial reset mechanism
11/24/1993EP0571209A2 Bit-line sensing in semiconductor memory devices
11/24/1993EP0570977A2 Semiconductor memory device
11/24/1993EP0570708A2 Open bit line memory devices and operational method
11/23/1993US5265063 Semiconductor memory device having a plurality of SRAMs operable in synchronism with a clock permitting simultaneous access to multiple data
11/23/1993US5265061 Apparatus for preventing glitch for semiconductor non-volatile memory device
11/23/1993US5265060 Semiconductor integrated circuit device with power consumption reducing arrangement
11/23/1993US5265049 Serial access memory capable of reading data serially at a speed double the writing speed
11/23/1993US5265047 High density SRAM circuit with single-ended memory cells
11/23/1993US5264743 Semiconductor memory operating with low supply voltage
11/18/1993EP0423309B1 Electronic still camera utilizing image compression and digital storage
11/16/1993US5263173 High speed clocked output driver for switching logic levels of an output pad at integer and integer and a half clock cycles
11/16/1993US5263003 Flash memory circuit and method of operation
11/16/1993US5263002 Semiconductor memory device and its topography
11/16/1993US5262996 First-in first-out
11/16/1993US5262995 Method for precharging imput/output lines of a memory device
11/16/1993US5262992 Semiconductor memory device having bit line pairs each divided into bit line sections with sense amplifier circuits
11/16/1993US5262990 Memory device having selectable number of output pins
11/16/1993US5262980 Opto-electronic memory system
11/10/1993EP0569218A2 Circuit for rotating a ditigal image
11/10/1993EP0568620A1 Cascading analog record/playback devices
11/09/1993US5261081 Sequence control apparatus for producing output signals in synchronous with a consistent delay from rising or falling edge of clock input signal
11/09/1993US5260909 Memory with phase locked serial input port
11/09/1993US5260905 Multi-port memory
11/09/1993US5260904 Data bus clamp circuit for a semiconductor memory device
11/09/1993US5260903 Semiconductor memory device
11/09/1993US5260901 Output circuit of semiconductor memory device
11/09/1993US5260899 Sense amplifier for semiconductor memory device
11/09/1993US5260892 Computer memory module
11/09/1993US5260555 IC memory card having direct and indirect access card interface functions
11/02/1993US5258958 Semiconductor memory device
11/02/1993US5258957 Semiconductor memory device
11/02/1993US5258955 Pre-charging method for the reading of memories
11/02/1993US5258952 Semiconductor memory with separate time-out control for read and write operations
11/02/1993US5258951 Memory having output buffer enable by level comparison and method therefor
11/02/1993US5258948 Memory cell sense technique
11/02/1993US5258669 Current sense amplifier circuit
11/02/1993CA1323928C 5-transistor memory cell with known state on power-up
10/1993
10/28/1993WO1993021578A1 Integrated semiconductor memory with redundancy arrangement
10/28/1993WO1993021575A1 A high density buffer memory architecture and method
10/28/1993DE4312238A1 Semiconductor memory with short-circuit testing function - has switches for alternately connecting cell select lines in column and=or row direction to current source line and ground, and has current meter for measuring leakage current.
10/26/1993US5257267 Variable length scan string and cell for same
10/26/1993US5257239 Memory cell with known state on power-up
10/26/1993US5257237 SAM data selection on dual-ported DRAM devices
10/26/1993US5257235 Semiconductor memory device having serial access mode
10/26/1993US5257233 Low power memory module using restricted RAM activation
10/26/1993US5257232 Sensing circuit for semiconductor memory with limited bitline voltage swing
10/26/1993US5257231 Semicustom-made integrated circuit with built-in memory unit associated with internal timing generator for internal write enable signal
10/26/1993US5257226 Integrated circuit with self-biased differential data lines
10/21/1993DE4313175A1 Audio signal recording using semiconductor memory - over-writing highest hierarchical levels of data already in memory with new data of lower levels when memory is full
10/20/1993EP0566014A2 Multi port memory system
10/20/1993EP0213577B1 Apparatus providing data backup upon power failure in a micro-computer controlled television receiver
10/19/1993US5255383 Method and apparatus for skewing a memory read clock signal in a magnetic disk drive system
10/19/1993US5255244 Method and apparatus for serially programming an on-chip EPROM in a microcontroller
10/19/1993US5255243 Random access memory device having transfer gate unit for blocking flash write data buffer unit from parasitic capacitance coupled with bit line pairs of memory cells
10/19/1993US5255242 Sequential memory
10/19/1993US5255241 Apparatus for intelligent reduction of worst case power in memory systems
10/19/1993US5255235 Dynamic random access memory with dummy word lines connected to bit line potential adjusting capacitors
10/19/1993US5255233 Non-volatile semiconductor memory device equipped with sense amplifier circuit for discriminating small differential voltage level
10/19/1993US5255225 Semiconductor integrated circuit device and memory consisting of semiconductor integrated circuit
10/19/1993US5255223 Semiconductor memory device having alternatively operated equalizing and erasing functions
10/19/1993US5255222 Output control circuit having continuously variable drive current
10/13/1993EP0564813A1 Bit line switch array for electronic computer memory
10/13/1993EP0564562A1 Portable random access audio recording and playback apparatus
10/12/1993US5253214 High-performance memory controller with application-programmable optimization
10/12/1993US5253213 Semiconductor memory used for changing sequence of data
10/12/1993US5253210 Paritioned bit line structure of EEPROM and method of reading data therefrom
10/12/1993US5253203 Subarray architecture with partial address translation
10/12/1993US5253137 Field-effect transistor memory circuit
10/12/1993CA1323101C Apparatus for regenerating information from records made by optical-wavelength-multiplexing method
10/06/1993EP0563656A2 Semiconductor memory device
10/05/1993US5251181 Random access memory device and method of controlling same in pipe line page mode
10/05/1993US5251175 Semiconductor memory device
09/1993
09/30/1993WO1993019468A2 Flash-clear of ram array using partial reset mechanism
09/29/1993EP0562669A1 Device comprising means for datavalidation in a memory
09/29/1993EP0562605A2 Dynamic random access memory device having addressing section and/or data transferring path arranged in pipeline architecture
09/29/1993EP0562604A2 Semiconductor first-in first-out memory device
09/28/1993US5249229 Device and method for generating control signals
09/28/1993US5249165 Memory cell array divided type multi-port semiconductor memory device
09/28/1993US5249159 Semiconductor memory
09/28/1993US5249154 Data access controller and method
09/28/1993US5249153 Reading pre-charge circuit for integrated circuit memory
09/28/1993US5249152 Bookkeeping memory
09/28/1993US5248908 3-state bidirectional buffer and portable semiconductor storage device incorporating the same
09/28/1993US5248907 Output buffer with controlled output level
09/23/1993DE4308665A1 DRAM with bidirectional global bit line - has global bit lines joined to local bit lines to create bidirectional data access path for writing data to or reading from cell
09/23/1993DE4207474A1 Image data memory storage for data loss free processing - has simultaneous writing and reading of data with buffer connected to main memory
09/22/1993EP0561370A2 A clock-synchronous semiconductor memory device and access method thereof
09/22/1993EP0561306A2 Clock-synchronous semiconductor memory device and method for accessing the device
09/22/1993EP0561271A2 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
09/21/1993US5247485 Memory device
09/21/1993US5247484 Multiport DRAM
09/21/1993US5247483 Sense amplifier circuit
09/21/1993US5247482 Semiconductor memory device with high speed write operation
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