Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/1987
11/10/1987US4705966 Circuit for generating a substrate bias
11/05/1987WO1987006743A1 Image processor
11/04/1987EP0243859A2 Two port random access memory with column redundancy
11/04/1987CN87103121A Sense amplifier
11/03/1987US4704705 Two transistor DRAM cell and array
11/03/1987US4704368 Method of making trench-incorporated monolithic semiconductor capacitor and high density dynamic memory cells including the capacitor
10/1987
10/28/1987EP0243169A2 Sense amplifiers
10/28/1987EP0242948A1 Refresh operation control circuit for semiconductor device
10/28/1987EP0242721A2 Boot-strap type signal generating circuit
10/28/1987EP0242539A2 Inhibit and transfer circuitry for memory cell being read from multiple ports
10/27/1987US4703458 Circuit for writing bipolar memory cells
10/27/1987US4703457 Register circuit used to load, hold, and dump digital logic signals
10/27/1987US4703454 CMOS static storage cell having noncrossing interconnection conductors
10/27/1987US4702797 Forming region of first conductivity type with high concentration of impurity
10/21/1987EP0241948A1 Semiconductor memory and method for fabricating the same
10/21/1987EP0241671A2 Register providing simultaneous reading and writing to multiple ports
10/21/1987EP0241637A2 Sense circuit for multilevel storage system
10/20/1987US4701919 Semiconductor device incorporating memory test pattern generating circuit
10/20/1987US4701889 Static semiconductor memory device
10/20/1987US4701885 Dynamic memory array with quasi-folded bit lines
10/20/1987US4701884 Semiconductor memory for serial data access
10/20/1987US4701883 ECL/CMOS memory cell with separate read and write bit lines
10/20/1987US4701882 Bipolar RAM cell
10/20/1987US4701843 Refresh system for a page addressable memory
10/20/1987US4701637 Substrate bias generators
10/20/1987US4701385 Ion-implanted magnetic bubble device and a method of manufacturing the same
10/20/1987CA1228425A1 Dynamic ram cell with mos trench capacitor in cmos
10/14/1987EP0241078A1 Memory comprising simultaneously addressable memory elements
10/14/1987EP0240553A1 Combined nucleate-replicate single wall domain generate structure
10/14/1987EP0139803B1 Method of recovering lost information in a digital speech transmission system, and transmission system using said method
10/13/1987US4700330 Memory for a digital data processing system including circuit for controlling refresh operations during power-up and power-down conditions
10/13/1987US4700329 Semiconductor memory device having dummy cells of divided charge type
10/13/1987US4700328 High speed and high efficiency layout for dram circuits
10/08/1987DE3710536A1 Dynamic semi-conductor memory with a Sense amplifier of BIMOS construction
10/07/1987EP0240156A2 Semiconductor memory device
10/07/1987EP0240155A2 Semiconductor memory device
10/07/1987EP0240135A2 Bloch line memory device and method for operating same
10/07/1987EP0239951A2 Pseudo-static memory subsystem
10/07/1987EP0239916A2 Semiconductor memory device having a test mode and a standard mode of operation
10/07/1987EP0239913A2 Semiconductor memory circuit
10/07/1987EP0239569A1 Neurological and biological molecular electro-optical devices and method
10/06/1987US4698812 Memory system employing a zero DC power gate array for error correction
10/06/1987US4698788 Static random access memory responsive to column and row address signals
10/06/1987US4698786 Magnetic bubble memory device
09/1987
09/30/1987EP0239225A2 Semiconductor memory device
09/30/1987EP0239224A2 Random access memory apparatus
09/30/1987EP0239208A2 Dynamic RAM
09/30/1987EP0239187A2 Semiconductor memory device
09/30/1987EP0239021A2 Semiconductor memory device
09/30/1987EP0238550A1 Memory system with page mode operation.
09/29/1987US4697252 Dynamic type semiconductor memory device
09/29/1987US4697251 Bipolar RAM cell
09/29/1987US4697112 Current-mirror type sense amplifier
09/29/1987US4697106 Programmable memory circuit
09/29/1987US4697104 Two stage decoder circuit using threshold logic to decode high-order bits and diode-matrix logic to decode low-order bits
09/29/1987CA1227572A1 Charge pump system for non-volatile ram
09/23/1987EP0238417A2 Semiconductor memory device
09/23/1987EP0238379A1 Dynamic memory with a write monocycle of a logic states field
09/23/1987EP0238370A1 Hybrid technology magnetic bubble memory
09/23/1987EP0238358A2 Buffer circuit
09/23/1987EP0238228A2 Semiconductor memory
09/23/1987EP0238180A1 High gain sense amplifier for small current differential
09/23/1987EP0237898A2 Semiconductor large scale integrated circuit with noise cut circuit
09/23/1987EP0237813A2 Semiconductor memory device having improved precharge scheme
09/23/1987EP0237785A2 Dynamic read/write memory with improved refreshing operation
09/22/1987US4695981 Integrated circuit memory cell array using a segmented word line
09/22/1987US4695980 Integrated circuit having a common input terminal
09/22/1987US4695978 Semiconductor memory device
09/22/1987US4695864 Dynamic storage device with extended information holding time
09/22/1987US4695746 Substrate potential generating circuit
09/22/1987US4694561 Method of making high-performance trench capacitors for DRAM cells
09/16/1987EP0237425A1 Integrated circuit with a modified architecture, and its production process
09/16/1987EP0237374A1 Hybrid technique magnetic bubble memory
09/16/1987EP0237361A2 Semiconductor memory device
09/16/1987EP0237337A2 Random access memory circuits
09/16/1987EP0237322A2 Latch circuit
09/16/1987EP0237116A1 Memory provided with a buffer amplifier
09/16/1987EP0236696A2 Non-volatile electronic memory
09/15/1987US4694454 Dynamic memory diagnosis and error correction apparatus
09/15/1987US4694433 Semiconductor memory having subarrays and partial word lines
09/15/1987US4694432 Semiconductor memory device
09/15/1987US4694431 Semiconductor memory device with increased adaptability
09/15/1987US4694429 Semiconductor memory device
09/15/1987US4694428 Semiconductor memory
09/15/1987US4694424 Combined nucleate-replicate single wall domain generate structure
09/15/1987US4694278 Integrable decoding circuit
09/15/1987US4694205 Midpoint sense amplification scheme for a CMOS DRAM
09/15/1987US4694197 Control signal generator
09/15/1987CA1226942A1 Apparatus and method for testing and verifying the refresh logic of dynamic mos memories
09/15/1987CA1226908A1 Highly sensitive high performance sense amplifiers
09/10/1987DE3607085A1 Static storage location with semiconductor four-layer structure which can be deactivated and activated by field effect
09/09/1987EP0236089A2 Dynamic random access memory having trench capacitor
09/09/1987EP0236053A2 Memory system employing a zero DC power gate array for error correction
09/09/1987EP0236052A2 Memory system employing a low DC power gate array for error correction
09/09/1987EP0235889A1 Data reading circuit for semiconductor memory device
09/09/1987EP0126771B1 Apparatus and method for arbitrating between signals
09/08/1987US4692900 Semiconductor memory device having block pairs
09/08/1987US4692898 Bubble memory bias field structure
09/08/1987US4692689 FET voltage reference circuit with threshold voltage compensation
09/08/1987US4692642 Active pull-up circuit controlled by a single pull-up clock signal