Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
---|
10/01/1991 | US5053995 Tunnel current data storage apparatus having separate lever bodies |
10/01/1991 | US5053983 Filter system having an adaptive control for updating filter samples |
10/01/1991 | US5053848 Apparatus for providing single event upset resistance for semiconductor devices |
10/01/1991 | US5053648 Master slice cmos array having complementary columns |
10/01/1991 | CA1290044C Broadband signal switching equipment |
09/29/1991 | CA2039100A1 Dram cell field architecture having higher-ranking bit switch lines and higher-ranking bit lines |
09/25/1991 | EP0448141A1 Programming process suitable for defining at least four different current levels in an ROM memory cell |
09/25/1991 | EP0448025A2 A semiconductor memory device |
09/25/1991 | EP0447937A2 Image memory |
09/25/1991 | EP0447624A2 Multiple memory mode-set for IC memory chip |
09/25/1991 | EP0231237B1 Control system for chained circuit modules |
09/25/1991 | EP0212997B1 Semiconductor integrated circuit adapted to carry out a test operation |
09/25/1991 | CN1054850A Low power, ttl level cmos imput buffer with hysteresis |
09/24/1991 | US5051959 Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type |
09/24/1991 | US5051958 Nonvolatile static memory device utilizing separate power supplies |
09/24/1991 | US5051955 Semiconductor memory having improved data readout scheme |
09/24/1991 | US5051954 Semiconductor memory device |
09/24/1991 | US5051952 Semiconductor memory device having capacitors through which data read/write is carried out |
09/24/1991 | US5051950 Read/write optical memory |
09/24/1991 | US5051890 Program/data memory employed in microcomputer system |
09/24/1991 | US5051627 Superconducting nonhysteretic logic design |
09/19/1991 | WO1991011007A3 Serial dram controller with transparent refresh |
09/18/1991 | EP0447057A2 Digital computer with non-hierarchical memory |
09/18/1991 | EP0446847A2 Semiconductor memory device having improved write function |
09/18/1991 | EP0446721A2 Distributed processing memory |
09/18/1991 | EP0446595A2 A buffer circuit |
09/18/1991 | EP0208555B1 Semiconductor memory device having redundancy configuration |
09/18/1991 | EP0146357B1 Semiconductor memory device |
09/17/1991 | USRE33694 Dynamic memory array with segmented bit lines |
09/17/1991 | US5050127 Memory device with improved common data line bias arrangement |
09/17/1991 | US5050122 Bloch line memory device and method for operating same |
09/17/1991 | CA1289202C Latch-up protection circuit for integrated circuits using complementarymos circuit technology |
09/12/1991 | DE4107558A1 Protecting data stored in ROM - using code stored in user programme with checks on data and addresses |
09/11/1991 | EP0445574A2 Digital clock buffer circuit providing controllable delay |
09/10/1991 | US5047986 Semiconductor memory |
09/10/1991 | US5047985 Static random access memory device having a high speed read-out and precharging arrangement |
09/10/1991 | US5047984 Internal synchronous static RAM |
09/10/1991 | US5047983 Semiconductor storage device with redundancy arrangement |
09/10/1991 | US5047980 BiCMOS memory having memory cells connected directly to address decoders |
09/10/1991 | US5047979 High density SRAM circuit with ratio independent memory cells |
09/10/1991 | US5047978 Bloch line memory device |
09/10/1991 | US5047814 E2 PROM cell including isolated control diffusion |
09/10/1991 | US5047706 Constant current-constant voltage circuit |
09/10/1991 | US5047657 Integrated circuit comprising a signal level converter |
09/06/1991 | CA2037593A1 Digital clock buffer circuit providing controllable delay |
09/05/1991 | WO1991013439A1 Storage for memory |
09/05/1991 | WO1991013438A1 Device for reading out cylindrical magnetic domains |
09/05/1991 | WO1991013396A1 Memory based line-delay architecture |
09/04/1991 | EP0444774A2 Method and apparatus for driving a digital bus |
09/04/1991 | EP0444707A2 Dynamic random access memory device having static column mode of operation without destruction of data bit |
09/04/1991 | EP0444687A2 Semiconductor memory circuit device having gate array memory cells |
09/04/1991 | EP0444602A2 Decoder circuit |
09/04/1991 | EP0444407A2 High speed decoding circuit with improved AND gate |
09/03/1991 | US5046052 Internal low voltage transformation circuit of static random access memory |
09/03/1991 | US5046050 Shared BiCMOS sense amplifier |
09/03/1991 | US5046049 Method of flash write for testing a RAM |
09/03/1991 | US5046044 SEU hardened memory cell |
09/03/1991 | US5045899 Dynamic random access memory having stacked capacitor structure |
09/03/1991 | US5045720 Method for selecting a spare column and a circuit thereof |
08/28/1991 | EP0443989A2 Sense circuit for reading data stored in nonvolatile memory cells |
08/27/1991 | USRE33676 Gate array circuit for decoding circuits |
08/27/1991 | US5043947 Semiconductor memory device |
08/27/1991 | US5043946 Semiconductor memory device |
08/27/1991 | US5043945 Memory with improved bit line and write data line equalization |
08/27/1991 | US5043944 Semiconductor memory device with improved output to differential data lines |
08/27/1991 | US5043940 Flash EEPROM memory systems having multistate storage cells |
08/27/1991 | US5043939 Soft error immune memory |
08/27/1991 | US5043820 Focal plane array readout employing one capacitive feedback transimpedance amplifier for each column |
08/27/1991 | US5043597 Substrate bias generation circuit used in semiconductor integrated circuit |
08/22/1991 | WO1991012614A1 Information storage for memory device based on cylindrical magnetic domains |
08/22/1991 | DE4105104A1 Halbleiterspeichereinrichtung und verfahren zur fehlerkorrektur Semiconductor memory device and method for error correction |
08/21/1991 | EP0442610A2 CMOS precharge and equalization circuit |
08/21/1991 | EP0442301A2 Dynamic RAM with on-chip ECC and optimized bit and word redundancy |
08/21/1991 | EP0442283A2 Low power addressing systems |
08/20/1991 | US5042013 Semiconductor memory |
08/20/1991 | US5042012 Serial access dynamic ram |
08/20/1991 | US5042011 Sense amplifier pulldown device with tailored edge input |
08/20/1991 | US5042010 Semiconductor integrated circuit |
08/20/1991 | US5041880 Logic device and memory device using ceramic superconducting element |
08/20/1991 | US5041739 Substrate potential generating circuit |
08/14/1991 | EP0441584A2 Ferroelectric memory structure |
08/14/1991 | EP0441388A2 Semiconductor memory circuit |
08/14/1991 | EP0441231A2 Semiconductor memory device |
08/14/1991 | EP0441201A2 A substrate bias voltage detection circuit |
08/14/1991 | EP0441200A2 Sense amplifier and method for sensing the outputs of static random access memory cells |
08/14/1991 | EP0440628A1 Devices using superconductive crystals |
08/14/1991 | DE4104095A1 Semiconductor video random-access memory for serial readout - incorporates mode decoder and interval control circuit for marking of serial register to provide wanted data |
08/13/1991 | US5040152 Fast static random access memory with high storage capacity |
08/13/1991 | US5040151 Memory circuit with improved power interconnections |
08/13/1991 | US5040146 Static memory cell |
08/13/1991 | US5040145 Memory cell with active write load |
08/13/1991 | US5040143 Semiconductor memory device |
08/13/1991 | US5040036 Trench-isolated self-aligned split-gate EEPROM transistor and memory array |
08/13/1991 | US5039958 Integrated semiconductor device including an insulated-gate field effect transistor biased to a constant level in order to produce a negative differential drain conductance zone |
08/13/1991 | US5039877 Low current substrate bias generator |
08/13/1991 | US5039656 High density solid state sandwich structure for stable efficient operation |
08/13/1991 | US5039655 Thin film memory device having superconductor keeper for eliminating magnetic domain creep |
08/10/1991 | CA2035128A1 Ferroelectric memory structure |
08/07/1991 | EP0440204A2 Semiconductor integrated circuit device having main power terminal and backup power terminal independently of each other |
08/07/1991 | EP0440191A2 Multiport RAM and information processing unit |