Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/1991
11/13/1991EP0456419A2 Apparatus for driving a plurality of data output lines
11/13/1991EP0456394A2 Video memory array having random and serial ports
11/13/1991EP0456255A2 Dynamic memory device and method for screening the same
11/13/1991EP0456254A2 Semiconductor device and method of screening the same
11/13/1991EP0456195A2 Random access memory with redundancy relief circuit
11/13/1991EP0455977A2 Semiconductor memory device having diagnostic unit operable on parallel data bits
11/13/1991EP0455653A1 Integrated semiconductor store.
11/12/1991US5065369 Video memory device
11/12/1991US5065368 Video ram double buffer select control
11/12/1991US5065366 Non-volatile ram bit cell
11/12/1991US5065365 Semiconductor memory device carrying out reading and writing operations in order in one operating cycle and operating method therefor
11/12/1991US5065363 Semiconductor storage device
11/12/1991US5065132 Programmable resistor and an array of the same
11/12/1991US5065091 Semiconductor integrated circuit device testing
11/12/1991US5065055 Method and apparatus for high-speed bi-CMOS differential amplifier with controlled output voltage swing
11/12/1991US5065052 Arbiter circuit using plural-reset rs flip-flops
11/12/1991US5065049 MOS driver circuit having clamp means to hold the output voltage constant regardless of variations in the operating voltage
11/12/1991US5065044 Method for driving a pnpn semiconductor device
11/12/1991US5064499 Inductively sensed magnetic memory manufacturing method
11/07/1991DE4021600A1 Verfahren zum betriebsartwechsel einer speichervorrichtung mit zwei anschluessen A method for operating mode change a memory device with two terminals
11/06/1991EP0454981A2 A static random access split-emitter memory cell array
11/06/1991EP0454859A1 Semiconducteur integrated circuit
11/06/1991CN1014659B Semiconductor dynamic memory
11/05/1991US5063540 Semiconductor memory circuit with diode load circuits
11/05/1991US5063539 Ferroelectric memory with diode isolation
11/05/1991US5063304 Integrated circuit with improved on-chip power supply control
10/1991
10/31/1991WO1991016680A1 Integrated circuit i/o using a high preformance bus interface
10/30/1991EP0454170A2 Step-down unit incorporated in large scale integrated circuit
10/30/1991EP0454162A2 Semiconductor memory device
10/30/1991EP0454061A2 Dynamic random access memory device with improved power supply system for speed-up of rewriting operation on data bits read-out from memory cells
10/30/1991EP0453997A1 Semiconductor memory device
10/30/1991EP0453959A2 Semiconductor memory cell
10/30/1991EP0453813A2 An integrated circuit with improved on-chip power supply control
10/30/1991EP0453759A1 CMOS regenerative sense amplifier with high speed latching
10/30/1991CN1055813A Measurer for magnetic disc surface parameter
10/29/1991US5062082 Semiconductor memory device with delay in address predecoder circuit independent from ATD
10/29/1991US5062079 MOS type random access memory with interference noise eliminator
10/29/1991US5062077 Dynamic type semiconductor memory device
10/23/1991EP0452684A1 A reduced noise, data output stage of the buffer type for logic circuits of the CMOS type
10/23/1991EP0452649A2 Interlocked on-chip ecc system
10/23/1991EP0452648A1 Stacked bit line architecture for high density cross-point memory cell array
10/23/1991EP0452510A1 Semiconductor memory device
10/22/1991US5060200 Partial random access memory
10/22/1991US5060199 Semiconductor device with component circuits under symmetric influence of undesirable turbulence
10/22/1991US5060197 Static random access memory with redundancy
10/22/1991US5060196 Circuit for adjusting voltage level of data output in a semiconductor memory device
10/22/1991US5060194 Semiconductor memory device having a bicmos memory cell
10/22/1991US5060193 Magnetic state entry assurance
10/22/1991US5060192 Cross-point switch
10/22/1991US5060191 Ferroelectric memory
10/22/1991US5060138 Apparatus for use with a computing device for generating a substitute acknowledgement to an input when the computing device is in an operational hiatus
10/22/1991CA1291224C Logic circuit using resonant-tunneling transistor
10/17/1991WO1991015855A1 Memory cell with active write load
10/17/1991WO1991015854A1 Memory cell with active write load
10/17/1991WO1991015853A1 Very high density wafer scale device architecture
10/17/1991WO1991015852A1 Dynamic ram in which timing of end of data read out is earlier than conventional
10/17/1991WO1991009403A3 Dual port, dual speed image memory access arrangement
10/17/1991DE4107165A1 Single transistor semiconductor memory cell - includes capacitor with ferroelectric layer between opposing electrodes
10/16/1991EP0451870A2 Reference voltage generating circuit
10/16/1991EP0451666A2 Semiconductor memory
10/16/1991EP0451595A2 Short circuit detector circuit for memory array
10/16/1991EP0451594A2 Shared BiCMOS sense amplifier
10/16/1991EP0451453A1 Dynamic random access memory device equipped with two-way power voltage supplying system
10/15/1991US5058074 Integrated circuit including programmable circuit
10/15/1991US5058073 CMOS RAM having a complementary channel sense amplifier
10/15/1991US5058072 Semiconductor memory device with high speed sensing facility
10/15/1991US5058067 Individual bit line recovery circuits
10/15/1991US5058066 Output buffer precharge circuit for DRAM
10/15/1991US5058065 Memory based line-delay architecture
10/15/1991US5058059 Memory circuit having a redundant memory cell array for replacing faulty cells
10/15/1991US5058058 Structure for sense amplifier arrangement in semiconductor memory device
10/15/1991US5057718 Cmos regenerative sense amplifier with high speed latching
10/15/1991US5057704 Semiconductor integrated circuit having substrate potential detecting circuit commonly used
10/10/1991DE4039524A1 Substrate bias generator arrangement - has dual generators for run=up of power and stable supply states
10/09/1991EP0451000A1 Semiconductor memory device having improved controlling function for data buses
10/09/1991EP0450921A2 Information transfer method, information transfer apparatus, and its driving method
10/09/1991EP0450912A2 Opposed field magnetoresistive memory sensing
10/09/1991EP0450911A2 Magnetic state entry assurance
10/09/1991EP0450735A2 Seat
10/09/1991EP0450632A2 Nonvolatile semiconductor memory device
10/09/1991EP0450516A2 Semiconductor memory
10/09/1991EP0450454A1 Input buffer regenerative latch for ECL levels
10/09/1991EP0450159A2 DRAM cell field architecture with superposed bitline switches and bitlines
10/08/1991US5056095 Semiconductor memory having error correction circuit
10/08/1991US5055706 Delay circuit that resets after pulse-like noise
10/02/1991EP0449310A2 On-chip voltage regulator and semiconductor memory device using the same
10/02/1991EP0449282A2 Semiconductor memory circuit
10/02/1991EP0449251A2 Output circuit
10/02/1991EP0449235A2 High efficiency charge pump circuit
10/02/1991EP0449218A2 Semiconductor memory device having signal receiving facility fabricated from BI-CMOS circuits
10/02/1991EP0449207A2 Dynamic type semiconductor memory device
10/02/1991EP0449204A2 Dynamic type semiconductor memory device
10/02/1991EP0449028A1 CMOS memory device with improved sense amplifier biasing
10/02/1991EP0448980A2 Apparatus and method for memory device fault repair
10/02/1991EP0448879A1 SRAM based cell for programmable logic devices
10/02/1991DE4110140A1 Dual-port RAM cell circuit - has two bit lines pairs, each coupled to respective access terminal
10/01/1991US5054002 Memory unit with compensating delay circuit corresponding to a decoder delay
10/01/1991US5054000 Static random access memory device having a high speed read-out and flash-clear functions
10/01/1991US5053997 Dynamic random access memory with fet equalization of bit lines
10/01/1991US5053996 Dual state memory storage cell with improved data transfer circuitry
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