| Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428) |
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| 02/19/1997 | CA2183499A1 Apparatus and method for the real-time processing of a plurality of tasks |
| 02/18/1997 | US5604915 Data processing system having load dependent bus timing |
| 02/18/1997 | US5604913 Vector processor having a mask register used for performing nested conditional instructions |
| 02/18/1997 | US5604912 System and method for assigning tags to instructions to control instruction execution |
| 02/18/1997 | US5604909 Apparatus for processing instructions in a computing system |
| 02/18/1997 | US5604908 Computer program product for using build status indicators in connection with building of complex computer programs from source code parts |
| 02/18/1997 | US5604907 Computer system for executing action slots including multiple action object classes |
| 02/18/1997 | US5604906 Method and apparatus for installing software block-by block via an image of the target storage device |
| 02/18/1997 | US5604905 Method and apparatus for architecture independent executable files |
| 02/18/1997 | US5604904 Method and apparatus for accessing system management functions of a computer system |
| 02/18/1997 | US5604890 Coupling device for the switching of data lines between a data storage device controller and a plurality of bootable data storage devices |
| 02/18/1997 | US5604887 Method and system using dedicated location to share information between real and protected mode device drivers |
| 02/18/1997 | US5604885 Apparatus and method enabling a computer to transfer control between two program segments that call one another but operate in different modes |
| 02/18/1997 | US5604878 Method and apparatus for avoiding writeback conflicts between execution units sharing a common writeback path |
| 02/18/1997 | US5604877 Method and apparatus for resolving return from subroutine instructions in a computer processor |
| 02/18/1997 | US5604876 Apparatus for handling differing data length instructions using either directly specified or indirectly specified data lengths |
| 02/18/1997 | US5604865 Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU |
| 02/18/1997 | US5604860 Feature library and stored customized control interfaces |
| 02/18/1997 | US5604853 Text editor using insert, update and delete structures for undo and redo operations |
| 02/18/1997 | US5604851 Method and apparatus for constructing displays of partially ordered data |
| 02/18/1997 | US5604850 Method and system for dynamically generating computer instructions for performing a logical operation on bitmaps |
| 02/18/1997 | US5604849 Overlay management system and method |
| 02/18/1997 | US5604754 Validating the synchronization of lock step operated circuits |
| 02/18/1997 | US5604689 Arithmetic logic unit with zero-result prediction |
| 02/18/1997 | US5604600 Production trees for generic representation of document requirements for particular output terminals |
| 02/18/1997 | US5604516 Graphical user interface control for providing both automatic and manual data input |
| 02/13/1997 | WO1997005550A1 Protocol for arbitrating access to a shared memory area using historical state information |
| 02/13/1997 | WO1997005547A1 Virus protection in computer systems |
| 02/13/1997 | WO1997005546A1 Method for emulating program instructions |
| 02/13/1997 | WO1997005545A1 Microprocessor circuit organisation system and sequencing method |
| 02/13/1997 | WO1997005408A1 Circuitry for controlling a running or driving system of a motor vehicle |
| 02/13/1997 | WO1996041485A3 Pipelined multiplexing for a multiport memory |
| 02/13/1997 | CA2228703A1 Microprocessor circuit organisation system and sequencing method |
| 02/12/1997 | EP0757815A1 Machine failure isolation using qualitative physics |
| 02/12/1997 | EP0757812A1 Process for preparing for and accomplishing the fuzzification of a digital input signal at an input of a fuzzy processor |
| 02/12/1997 | EP0699320A4 Method for minimizing uncertainty in computer software processes allowing for automatic identification of faults locations and locations for modifications due to new system requirements with introduction of an alternative form of the target process object code allowing for less recompilation and re- |
| 02/12/1997 | CN1142870A Method and process of inter-machine communication and generalized method for program preparation therefor |
| 02/12/1997 | CN1142423A Apparatus for feedback-compensating working condition |
| 02/11/1997 | USRE35448 Method for establishing current terminal addresses for system users processing distributed application programs in an SNA LU 6.2 network environment |
| 02/11/1997 | US5603056 Disk drive control computer and method for rewriting control program in flash EEPROM with serial communication using unassigned pins of SCSI or ATA connector |
| 02/11/1997 | US5603055 Single shared ROM for storing keyboard microcontroller code portion and CPU code portion and disabling access to a portion while accessing to the other |
| 02/11/1997 | US5603048 Microprocessor with bus sizing function |
| 02/11/1997 | US5603047 Superscalar microprocessor architecture |
| 02/11/1997 | US5603045 Microprocessor system having instruction cache with reserved branch target section |
| 02/11/1997 | US5603035 Programmable interrupt controller, interrupt system and interrupt control process |
| 02/11/1997 | US5603034 Graphical resource editor for software customization |
| 02/11/1997 | US5603031 System and method for distributed computation based upon the movement, execution, and interaction of processes in a network |
| 02/11/1997 | US5603030 Method and system for destruction of objects using multiple destructor functions in an object-oriented computer system |
| 02/11/1997 | US5603029 System of assigning work requests based on classifying into an eligible class where the criteria is goal oriented and capacity information is available |
| 02/11/1997 | US5603028 Method and apparatus for data distribution |
| 02/11/1997 | US5603027 Computer program version management system with reduced storage space and enabling multiple program versions to have the same name |
| 02/11/1997 | US5603018 Program developing system allowing a specification definition to be represented by a plurality of different graphical, non-procedural representation formats |
| 02/11/1997 | US5603017 Parallel integrated circuit having DSP module and CPU core operable for switching between two independent asynchronous clock sources while the system continues executing instructions |
| 02/11/1997 | US5603014 Protected mode simulation of a real mode interupt based programming interface in a computer system |
| 02/11/1997 | US5603012 Start code detector |
| 02/11/1997 | US5602998 Dequeue instruction in a system architecture for improved message passing and process synchronization |
| 02/11/1997 | US5602997 Customizable program control interface for a computer system |
| 02/11/1997 | US5602996 Method and apparatus for determining window order when one of multiple displayed windows is selected |
| 02/11/1997 | US5602993 Method and system for revising data in a distributed data communication system |
| 02/11/1997 | US5602982 Universal automated training and testing software system |
| 02/11/1997 | US5602966 Modeling device and modeling method for determining membership functions for fuzzy logic processing |
| 02/11/1997 | US5602840 Program-controlled ISDN switching system with a program module constructed in accordance with the principles of object-oriented programming for the handling of switched connections |
| 02/11/1997 | US5602754 Parallel execution of a complex task partitioned into a plurality of entities |
| 02/11/1997 | US5602738 Control apparatus for automobile engine including microcomputer which may be programmed after mounting on a circuit board |
| 02/06/1997 | WO1997004571A1 Method and apparatus for emulating a circuit connection in a cell based communications network |
| 02/06/1997 | WO1997004570A1 Controlling bandwidth allocation using a pace counter |
| 02/06/1997 | WO1997004569A1 Port and link identification |
| 02/06/1997 | WO1997004568A1 Asynchronous transfer mode based service consolidation switch |
| 02/06/1997 | WO1997004567A1 Method and apparatus for discarding frames in a communications device |
| 02/06/1997 | WO1997004566A1 Converting between an internal cell and multiple standard asynchronous transfer mode cells |
| 02/06/1997 | WO1997004565A1 Priority arbitration for point-to-point and multipoint transmission |
| 02/06/1997 | WO1997004564A1 Allocated and dynamic bandwidth management |
| 02/06/1997 | WO1997004563A1 Joint flow control mechanism in a telecommunications network |
| 02/06/1997 | WO1997004562A1 Point-to-multipoint arbitration |
| 02/06/1997 | WO1997004561A1 Link scheduling |
| 02/06/1997 | WO1997004560A1 Mapping a data cell in a communication switch |
| 02/06/1997 | WO1997004559A1 Switch fabric controller comparator system and method |
| 02/06/1997 | WO1997004558A1 Linked-list structures for multiple levels of control in an atm switch |
| 02/06/1997 | WO1997004557A1 Minimum guaranteed cell rate method and apparatus |
| 02/06/1997 | WO1997004556A1 Link buffer sharing method and apparatus |
| 02/06/1997 | WO1997004555A1 Method and apparatus for queuing data in a communications device |
| 02/06/1997 | WO1997004554A1 Method and system for controlling network service parameters in a cell based communications network |
| 02/06/1997 | WO1997004552A1 Point-to-multipoint transmission using subqueues |
| 02/06/1997 | WO1997004549A1 Hierarchical resource management |
| 02/06/1997 | WO1997004548A1 Redundant switch system and method of operation |
| 02/06/1997 | WO1997004546A1 Method and apparatus for reducing information loss in a communications network |
| 02/06/1997 | WO1997004544A1 Network switch utilizing centralized and partitioned memory for connection topology information storage |
| 02/06/1997 | WO1997004543A2 Allocated and dynamic switch flow control |
| 02/06/1997 | WO1997004542A2 Multipoint-to-point arbitration in a network switch |
| 02/06/1997 | WO1997004541A2 Multipoint to multipoint processing in a network switch having data buffering queues |
| 02/06/1997 | WO1997004397A1 Serial control and data interconnect system using a crossbar switch and a multipoint topology |
| 02/06/1997 | WO1997004391A1 Transaction log management in a disconnectable computer and network |
| 02/06/1997 | WO1997004390A1 Transaction clash management in a disconnectable computer and network |
| 02/06/1997 | WO1997004389A1 Transaction synchronization in a disconnectable computer and network |
| 02/06/1997 | WO1997004387A1 Optimized synchronisation procedure |
| 02/06/1997 | WO1997004386A1 Virtual network architecture |
| 02/06/1997 | WO1997004385A1 Computer system |
| 02/06/1997 | WO1997004384A1 Dynamic load balancing |
| 02/06/1997 | WO1997004383A1 Shared virtual desktop collaborative application system |
| 02/06/1997 | WO1997004367A1 Programmable logical controller |