Patents
Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428)
06/1997
06/21/1997CA2193341A1 Computer system data i/o by reference among multiple data sources and sinks
06/21/1997CA2193340A1 Computer system data i/o by reference among cpus and multiple memory units
06/21/1997CA2193174A1 Computer system data i/o by reference among cpus and i/o devices
06/19/1997WO1997022197A1 A system platform for a communication system
06/19/1997WO1996027155A3 Systems and methods for secure transaction management and electronic rights protection
06/19/1997CA2239885A1 A system platform for a communication system
06/18/1997EP0779759A2 A method and architecture for an interactive two-way data communication network
06/18/1997EP0779716A2 A system and method for a scalable and reliable transmission of electronic software distribution
06/18/1997EP0779584A1 Apparatus for storing information for a host processor
06/18/1997EP0779580A1 Process for the automation of informatic procedures and device therefor
06/18/1997EP0779577A2 Micoprocessor pipe control and register translation
06/18/1997EP0779576A1 A method for operating a digital data processor to perform a fuzzy rule evaluation operation
06/18/1997EP0779573A1 Computer system with multiple display units for displaying data related to different processes
06/18/1997EP0746815A4 Method and system for interfacing to a type library
06/18/1997EP0714531B1 Object-oriented video system
06/18/1997EP0714530B1 Object-oriented midi system
06/18/1997EP0511209B1 File characterization for computer operating and file management systems
06/18/1997EP0476262B1 Error handling in a VLSI central processor unit employing a pipelined address and execution module
06/18/1997EP0437441B1 Workstation and method of operating it
06/18/1997CN1152142A Network hibernation system
06/17/1997US5640604 Buffer reallocation system
06/17/1997US5640590 Method and apparatus for scripting a text-to-speech-based multimedia presentation
06/17/1997US5640588 CPU architecture performing dynamic instruction scheduling at time of execution within single clock cycle
06/17/1997US5640584 Virtual processor method and apparatus for enhancing parallelism and availability in computer systems
06/17/1997US5640582 Register stacking in a computer system
06/17/1997US5640579 Method and system for logically partitioning a view of a document object from a frame in which the document object is displayed
06/17/1997US5640578 Arithmetic logic unit having plural independent sections and register storing resultant indicator bit from every section
06/17/1997US5640576 System for generating a program using the language of individuals
06/17/1997US5640572 System and method for mapping driver level event function calls from a process-based driver level program to a session-based instrumentation control driver level system
06/17/1997US5640570 Information handling system for transmitting contents of line register from asynchronous controller to shadow register in another asynchronous controller determined by shadow register address buffer
06/17/1997US5640569 Diverse goods arbitration system and method for allocating resources in a distributed computer system
06/17/1997US5640568 Inline expansion method for programming languages having array functions
06/17/1997US5640567 Apparatus and method for software system management using second-order logic
06/17/1997US5640564 Computer system
06/17/1997US5640563 Multi-media computer operating system and method
06/17/1997US5640562 Layering hardware support code on top of an existing operating system
06/17/1997US5640558 Identifying and analyzing multiple level class relationships in an object oriented system by parsing source code without compilation
06/17/1997US5640548 Method and apparatus for unstacking registers in a data processing system
06/17/1997US5640546 Method for the operation of a computer-based system
06/17/1997US5640528 Method and apparatus for translating addresses using mask and replacement value registers
06/17/1997US5640526 Superscaler instruction pipeline having boundary indentification logic for variable length instructions
06/17/1997US5640525 Data-driven information processing devices
06/17/1997US5640524 Method and apparatus for chaining vector instructions
06/17/1997US5640518 Addition of pre-last transfer acknowledge signal to bus interface to eliminate data bus turnaround on consecutive read and write tenures and to allow burst transfers of unknown length
06/17/1997US5640503 Method and apparatus for verifying a target instruction before execution of the target instruction using a test operation instruction which identifies the target instruction
06/17/1997US5640501 Development system and methods for visually creating goal oriented electronic form applications having decision trees
06/17/1997US5640500 Computer program product for enabling a computer to construct displays of partially ordered data
06/17/1997US5640498 Accessbar arbiter
06/17/1997US5640319 Switch control methods and apparatus
06/17/1997US5640248 Facsimile apparatus for compressing and storing program related to maintenance function
06/12/1997WO1997021171A1 Extensible selection feedback and graphic interaction
06/12/1997WO1997021163A1 Method and apparatus for determining the status of a shared resource
06/12/1997WO1997021161A2 Modular virtualizing device driver architecture
06/12/1997WO1997018505A3 Method and arrangement for operating a mass memory storage peripheral computer device connected to a host computer
06/12/1997DE19545516A1 Indirect addressing replacing
06/11/1997EP0778535A2 Distributed asynchronous workflow system and method
06/11/1997EP0778523A2 Method of operation for an image processing apparatus
06/11/1997EP0778522A2 System and method for generating trusted, architecture specific, compiled versions of architecture neutral programs
06/11/1997EP0778521A2 System and method for runtime optimization of private variable function calls in a secure interpreter
06/11/1997EP0778520A2 System and method for executing verifiable programs with facility for using non-verifiable programs from trusted sources
06/11/1997EP0778519A2 Multiple instruction dispatch system for pipelined microprocessor without branch breaks
06/11/1997EP0778514A1 Production trees for generic representation of document requirements for particular output terminals
06/11/1997EP0778512A2 System and method for managing try-and-buy usage of application programs
06/11/1997EP0777877A2 Processing system, processor, memory storing instruction stream and compiler
06/11/1997EP0777874A2 Pipelined data processing circuit
06/11/1997EP0714529B1 Multimedia data routing system
06/11/1997CN1151796A Data management system for a real-time system
06/11/1997CN1151699A Health compsn.
06/10/1997US5638539 Tool for defining complex systems
06/10/1997US5638526 Apparatus for operand data bypassing having previous operand storage register connected between arithmetic input selector and arithmetic unit
06/10/1997US5638525 Processor capable of executing programs that contain RISC and CISC instructions
06/10/1997US5638524 Digital signal processor and method for executing DSP and RISC class instructions defining identical data processing or data transfer operations
06/10/1997US5638517 Method and apparatus for transmitting a message from a computer system over a network adapter to the network by performing format conversion and memory verification
06/10/1997US5638504 System and method of processing documents with document proxies
06/10/1997US5638494 Adaptive communication system
06/10/1997US5638490 Fuzzy logic data processor
06/10/1997US5638312 Method and apparatus for generating a zero bit status flag in a microprocessor
06/10/1997US5638306 Testing hooks for testing an integrated data processing system
06/10/1997US5638009 Three conductor asynchronous signaling
06/10/1997US5637932 Power consumption control system
06/09/1997CA2190556A1 System and method for executing verifiable programs with facility for using non-verifiable programs from trusted sources
06/05/1997WO1997020268A1 A parametrizable control module comprising first and second loadables counters, an electronic circuit comprising a plurality of such parametrized control modules, and a method for synthesizing such circuit
06/05/1997WO1997020267A1 Method and system for modeling and presenting integrated media
06/05/1997WO1997020258A1 Multiple-agent hybrid control architecture
06/05/1997DE19633919C1 Program module updating method for mobile communications appts
06/05/1997DE19544571A1 Programming flash EEPROM e.g. for digital answering machine
06/04/1997EP0777208A1 Musical information processing system
06/04/1997EP0777179A1 Direct bulk data transfers
06/04/1997EP0777178A1 Data processing system
06/04/1997EP0777177A1 A method for object-oriented programming using dynamic interfaces
06/04/1997EP0776508A1 Strategy driven planning system and method of operation
06/04/1997EP0776506A1 Interactive report generation system and method of operation
06/04/1997EP0776502A2 Scalable distributed computing environment
06/04/1997EP0760137A4 Method and apparatus for accessing a distributed data buffer
06/04/1997EP0744051A4 I/o decoder map
06/04/1997EP0712513B1 Graphic editor framework system
06/04/1997EP0664019B1 Command system
06/04/1997EP0636256B1 Superscalar risc processor instruction scheduling
06/04/1997CN1151219A Providing a master device with slave device capability information
06/04/1997CN1151052A Multinational correspondence service submitting system