Patents
Patents for G06F 9 - Arrangements for programme control, e.g. control unit (241,428)
05/1997
05/20/1997US5632033 Variable resolution method and arrangement
05/20/1997US5632032 Cross address space thread control in a multithreaded environment
05/20/1997US5632031 Method and means for encoding storing and retrieving hierarchical data processing information for a computer system
05/20/1997US5632030 Display control system capable of processing a plurality of continuous display updating command simultaneously
05/20/1997US5632028 Hardware support for fast software emulation of unimplemented instructions
05/20/1997US5632027 Method and system for mass storage device configuration management
05/20/1997US5632024 Microcomputer executing compressed program and generating compressed branch addresses
05/20/1997US5632023 Superscalar microprocessor including flag operand renaming and forwarding apparatus
05/20/1997US5632022 Encyclopedia of software components
05/20/1997US5631974 Image processing
05/20/1997US5631907 Reliable broadcast protocol structure for electronic software distribution
05/15/1997WO1997017656A1 Microcode patching apparatus and method
05/15/1997WO1997017654A1 A system and method for fast context switching between tasks
05/15/1997DE19635204A1 Exception security device for processor
05/14/1997EP0773491A2 Integrated circuit input/output processor having improved timer capability
05/14/1997EP0772878A1 Partitioned decoder circuit for low power operation
05/14/1997EP0772859A1 Assistance request system for networked multimedia workstations that provides remote launching of files
05/14/1997EP0772826A2 Code breakpoint decoder
05/14/1997EP0772825A1 Computer system having client-server architecture
05/14/1997EP0772824A1 Object-oriented operating system enhancement for filtering items in a window
05/14/1997EP0772823A1 Method and apparatus for controlling connected computers without programming
05/14/1997EP0772822A1 Microprocessor with pipelined access request to external memory
05/14/1997EP0772821A1 Tagged prefetch and instruction decoder for variable length instruction set and method of operation
05/14/1997EP0772820A1 Two tier prefetch buffer structure and method with bypass
05/14/1997EP0772819A2 Apparatus and method for efficiently determining addresses for misaligned data stored in memory
05/14/1997EP0772818A1 Apparatus and method for executing pop instructions
05/14/1997EP0772817A1 EXECUTION UNIT ARCHITECTECTURE TO SUPPORT x86 INSTRUCTION SET AND x86 SEGMENTED ADDRESSING
05/14/1997EP0772816A2 Double precision (64 bit) shift operations using a 32 bit data path
05/14/1997EP0772811A1 Defuzzifier for high-resolution fuzzy logic controller
05/14/1997EP0772809A1 Method for performing a "rotate through carry" operation
05/14/1997EP0733233A4 Apparatus and method for signal processing
05/14/1997CA2190209A1 Direct bulk data transfers
05/13/1997US5630166 For use in a data processing system
05/13/1997US5630164 Scientific instrument emulator having a computer and an analog signal interface for real-time signal processing
05/13/1997US5630162 Array processor dotted communication network based on H-DOTs
05/13/1997US5630159 Method and apparatus for personal attribute selection having delay management method and apparatus for preference establishment when preferences in a donor device are unavailable
05/13/1997US5630158 Central processing unit including inhibited branch area
05/13/1997US5630157 Computer organization for multiple and out-of-order execution of condition code testing and setting instructions
05/13/1997US5630153 Integrated digital signal processor/general purpose CPU with shared internal memory
05/13/1997US5630151 Data driven information processor generating multidimensional generation number identifying generation and additional attributes of data in data packet
05/13/1997US5630149 Pipelined processor with register renaming hardware to accommodate multiple size registers
05/13/1997US5630146 For use in a computer system
05/13/1997US5630143 Microprocessor with externally controllable power management
05/13/1997US5630141 Hierarchical apparatus and method for processing device interrupts in a computer system
05/13/1997US5630140 Ordered and reliable signal delivery in a distributed multiprocessor
05/13/1997US5630139 Program download type information processor
05/13/1997US5630138 method and system for merging files having a parallel format
05/13/1997US5630137 Condition handling in a multi-language computer program
05/13/1997US5630136 Method and apparatus for serializing access to multithreading unsafe resources
05/13/1997US5630134 Inter-processor exclusive control apparatus for enabling one of a plurality of processors execute an executable unit process
05/13/1997US5630133 Customer information control system and method with API start and cancel transaction functions in a loosely coupled parallel processing environment
05/13/1997US5630132 Method and apparatus for facilitating real-time and asynchronous loading and temporally-overlapping of modular multimedia software tasks in a multimedia data processing system
05/13/1997US5630131 Method and apparatus for importing and exporting archive files for a graphical user interface
05/13/1997US5630130 Multi-tasking low-power controller having multiple program counters
05/13/1997US5630129 Dynamic load balancing of applications
05/13/1997US5630128 Controlled scheduling of program threads in a multitasking operating system
05/13/1997US5630123 Software system utilizing a filtered priority queue and method of operation
05/13/1997US5630118 System and method for modifying and operating a computer system to perform date operations on date fields spanning centuries
05/13/1997US5630110 Method and apparatus for enhancing performance of a processor
05/13/1997US5630101 System for communication of image information between multiple-protocol imaging devices
05/13/1997US5630085 Microprocessor with improved instruction cycle using time-compressed fetching
05/13/1997US5630084 System for converting data in little endian to big endian and vice versa by reversing two bits of address referencing one word of four words
05/13/1997US5630083 Decoder for decoding multiple instructions in parallel
05/13/1997US5630082 Apparatus and method for instruction queue scanning
05/13/1997US5630076 In a computer system
05/13/1997US5630074 Inter-program communication and scheduling method for personal computers
05/13/1997US5630067 System for the management of multiple time-critical data streams
05/13/1997US5630066 Method of operating a distributed computer system
05/13/1997US5630042 Method and apparatus for providing collection browsers
05/13/1997CA2098414C Register architecture for a super scalar computer
05/09/1997WO1997016938A1 Upgrading software in a mobile telephone
05/09/1997WO1997016929A1 Service creation apparatus for a communications network
05/09/1997WO1997016795A1 Local and zone time data conversion processing for date-dependent information which spans one or two centuries
05/09/1997WO1997016785A1 A microprocessor using an instruction field to define dsp instructions
05/09/1997WO1997016784A1 Software production method, processor and recording medium
05/09/1997CA2236320A1 Service creation apparatus for a communications network
05/07/1997EP0772324A2 Systems and methods for sharing of resources
05/07/1997EP0772140A1 A design environment and a design method for hardware/software co-design
05/07/1997EP0772136A2 Method of commitment in a distributed database transaction
05/07/1997EP0772123A2 Data processing system with instruction prefetch
05/07/1997EP0772122A2 Method for translating a first program code to a second program code and a system for executing a second program code
05/07/1997EP0772121A1 Method and apparatus for memory sequencing
05/07/1997EP0772119A2 Automatic graphics operation
05/07/1997EP0772114A1 Apparatus and method for programming a job ticket in a document processing system
05/07/1997EP0771468A1 Multiple user data storage, retrieval and distribution system
05/07/1997EP0771444A1 Method for controlling technical operations or processes
05/07/1997EP0771442A1 Instruction memory limit check in microprocessor
05/07/1997EP0771441A1 Method and arrangement for using fuzzy logic in automation systems
05/07/1997EP0728331A4 Microcontroller with multiple timing functions available in a single peripheral module
05/07/1997EP0530351B1 Improved system and method for detecting cross-domain instruction calls and data references especiallly adapted for code interface jacketing in a multi-code execution and debugging system within a multi-architecture environment
05/07/1997EP0517269B1 Microcomputer with test mode switching function
05/07/1997EP0481995B1 Expert system
05/06/1997US5628027 Method of determining the configuration of devices installed on a computer bus
05/06/1997US5628024 Computer architecture capable of concurrent issuance and execution of general purpose multiple instructions
05/06/1997US5628021 System and method for assigning tags to control instruction processing in a superscalar processor
05/06/1997US5628018 Data processing apparatus handling plural divided interruption
05/06/1997US5628017 Method and system for providing event-response capabilities to pseudocode
05/06/1997US5628016 System for developing compiled computer code
05/06/1997US5628013 Apparatus and method for allocating processing time in a frame-based computer system
05/06/1997US5627998 System and method for mapping calls to functions in a first driver level library to a session-based instrumentation control driver level system